HT46R22/HT46C22
Rev. 1.10
13
October 2, 2002
Reset circuit
%
(
# ! ,
(
+
( %
(
5 > * (
* ) ) !
# & ' (
Reset configuration
The registers states are summarized in the following table.
Register
Reset
(Power On)
WDT Time-out
(Normal Operation)
RES Reset
(Normal Operation)
RES Reset
(HALT)
WDT Time-out
(HALT)*
TMR
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
uuuu uuuu
TMRC
00-0 1000
00-0 1000
00-0 1000
00-0 1000
uu-u uuuu
Program
Counter
000H
000H
000H
000H
000H
MP
-xxx xxxx
-uuu uuuu
-uuu uuuu
-uuu uuuu
-uuu uuuu
ACC
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
TBLP
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
TBLH
--xx xxxx
--uu uuuu
--uu uuuu
--uu uuuu
--uu uuuu
STATUS
--00 xxxx
--1u uuuu
--uu uuuu
--01 uuuu
--11 uuuu
INTC0
-000 0000
-000 0000
-000 0000
-000 0000
-uuu uuuu
INTC1
---0 ---0
---0 ---0
---0 ---0
---0 ---0
---u ---u
PA
1111 1111
1111 1111
1111 1111
1111 1111
uuuu uuuu
PAC
1111 1111
1111 1111
1111 1111
1111 1111
uuuu uuuu
PB
1111 1111
1111 1111
1111 1111
1111 1111
uuuu uuuu
PBC
1111 1111
1111 1111
1111 1111
1111 1111
uuuu uuuu
PC
---- --11
---- --11
---- --11
---- --11
---- --uu
PCC
---- --11
---- --11
---- --11
---- --11
---- --uu
PD
---- ---1
---- ---1
---- ---1
---- ---1
---- ---u
PDC
---- ---1
---- ---1
---- ---1
---- ---1
---- ---u
PWM
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
uuuu uuuu
HADR
xxxx xxx-
xxxx xxx-
xxxx xxx-
xxxx xxx-
uuuu uuu-
HCR
0--0 0---
0--0 0---
0--0 0---
0--0 0---
u--u u---
HSR
100- -0-1
100- -0-1
100- -0-1
100- -0-1
uuu- -u-u
HDR
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
uuuu uuuu
ADRL
x--- ----
x--- ----
x--- ----
x--- ----
u--- ----
ADRH
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
uuuu uuuu
ADCR
0100 0000
0100 0000
0100 0000
0100 0000
uuuu uuuu
ACSR
1--- --00
1--- --00
1--- --00
1--- --00
u--- --uu
Note:
* stands for warm reset
u stands for unchanged
x stands for unknown