參數(shù)資料
型號(hào)： HT36A0
廠(chǎng)商： Holtek Semiconductor Inc.
英文描述： 8-Bit Music Synthesizer MCU
中文描述： 8位微控制器音樂(lè)合成器
文件頁(yè)數(shù)： 10/23頁(yè)
文件大?。?/td> 257K
代理商： HT36A0
HT36A0
Rev. 1.20
10
June 18, 2003
Once an interrupt subroutine is serviced, all other inter-
rupts will be blocked (by clearing the EMI bit). This
scheme may prevent any further interrupt nesting. Other
interrupt requests may occur during this interval but only
the interrupt request flag is recorded. If a certain inter-
rupt needs servicing within the service routine, the pro-
grammer may set the EMI bit and the corresponding bit
of the INTC to allow interrupt nesting. If the stack is full,
the interrupt request will not be acknowledged, even if
the related interrupt is enabled, until the SP is decre-
mented. If immediate service is desired, the stack must
be prevented from becoming full.
All these kinds of interrupt have a wake-up capability. As
an interrupt is serviced, a control transfer occurs by
pushing the program counter onto the stack and then
branching to subroutines at specified locations in the
program memory. Only the program counter is pushed
onto the stack. If the contents of the register and Status
register (STATUS) are altered by the interrupt service
program which may corrupt the desired control se-
quence, then the programmer must save the contents
first.
The internal Timer/Event Counter 0 interrupt is initial-
ized by setting the Timer/Event Counter 0 interrupt re-
quest flag (T0F; bit 5 of INTC), caused by a Timer/Event
Counter 0 overflow. When the interrupt is enabled, and
the stack is not full and the T0F bit is set, a subroutine
call to location 08H will occur. The related interrupt re-
quest flag (T0F) will be reset and the EMI bit cleared to
disable further interrupts.
The Timer/Event Counter 1 interrupt is operated in the
same manner as Timer/Event Counter 0. The related in-
terrupt control bits ET1I and T1F of the Timer/Event
Counter 1 are bit 3 and bit 6 of the INTC respectively.
During the execution of an interrupt subroutine, other in-
terrupt acknowledgments are held until the RETI in-
struction is executed or the EMI bit and the related
interrupt control bit are set to 1 (if the stack is not full). To
return from the interrupt subroutine, the RET or RETI in-
struction may be invoked. RETI will set the EMI bit to en-
able an interrupt service, but RET will not.
Interrupts occurring in the interval between the rising
edges of two consecutive T2 pulses, will be serviced on
the latter of the two T2 pulses, if the corresponding inter-
rupts are enabled. In the case of simultaneous requests
the priorities in the following table apply. These can be
masked by resetting the EMI bit.
Interrupt Source
Priority
Vector
Timer/event Counter 0 overflow
1
08H
Timer/event Counter 1 overflow
2
0CH
The Timer/Event Counter 0/1 interrupt request flag
(T0F/T1F), Enable Timer/Event Counter 0/1 bit
(ET0I/ET1I),EnableMasterInterruptbit(EMI)constitute
an interrupt control register (INTC) which is located at
0BH in the data memory. EMI, ET0I, ET1I are used to
control the enabling/disabling of interrupts. These bits
prevent the requested interrupt from being serviced.
Once the interrupt request flags (T0F, T1F) are set, they
will remain in the INTC register until the interrupts are
serviced or cleared by a software instruction.
It is recommended that a program does not use the
CALL subroutine within the interrupt subroutine. Be-
cause interrupts often occur in an unpredictable manner
or need to be serviced immediately in some applica-
tions, if only one stack is left and enabling the interrupt is
not well controlled, once the CALLsubroutine operates
in the interrupt subroutine, it may damage the original
control sequence.
Register
Bit No.
Label
Function
INTC
(0BH)
0
EMI
Controls the Master (Global) interrupt
(1=enabled; 0=disabled)
1
Unused bit, read as 0
2
ET0I
Controls the Timer/Event Counter 0 interrupt
(1=enabled; 0=disabled)
3
ET1I
Controls the Timer/Event Counter 1 interrupt
(1=enabled; 0=disabled)
4
Unused bit, read as 0
5
T0F
Internal Timer/Event Counter 0 request flag
(1=active; 0=inactive)
6
T1F
Internal Timer/Event Counter 1 request flag
(1=active; 0=inactive)
7
Unused bit, read as 0
INTC register
相關(guān)PDF資料
PDF描述
HT36A1 Music Synthesizer 8-Bit MCU
HT36A2 8-Bit Music Synthesizer MCU
HT36A3 8-Bit Music Synthesizer MCU
HT36A4 8-Bit Music Synthesizer MCU
HT3810 128 NOTE MELODY GENERATORS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HT36A0(48DIP) 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Microcontroller
HT36A1 制造商:HOLTEK 制造商全稱(chēng):Holtek Semiconductor Inc 功能描述:Music Synthesizer 8-Bit MCU
HT36A2 制造商:HOLTEK 制造商全稱(chēng):Holtek Semiconductor Inc 功能描述:8-Bit Music Synthesizer MCU
HT36A3 制造商:HOLTEK 制造商全稱(chēng):Holtek Semiconductor Inc 功能描述:8-Bit Music Synthesizer MCU
HT36A4 制造商:HOLTEK 制造商全稱(chēng):Holtek Semiconductor Inc 功能描述:Music Synthesizer 8-Bit MCU
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*