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參數(shù)資料
| 型號： | HT27LC512 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | OTP CMOS 64Kx 8-Bit EPROM |
| 中文描述： | 檢察官辦公室的CMOS 64Kx 8位存儲器 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 258K |
| 代理商： | HT27LC512 |
Auto product identification
The Auto Product Identification mode allows
the reading out of a binary code from an
E PROM that will identify its manufacturer and
type. This mode is intended for use by the pro-
gramming equipment for the purpose of auto-
matically matching the device to be
programmed with its corresponding program-
ming algorithm. This mode is functional in the
25
°
C
±
5
°
C ambient temperature range that is
required when programming the HT27LC512.
To activate this mode, the programming equip-
ment must force 12.0
±
0.5V on the address line A9
of the HT27LC512. Two identifier bytes may then
be sequenced from the device outputs by toggling
address line A0 from V
IL
to V
IH
, when A1=V
IH
. All
other address lines must be held at V
IH
during
Auto Product Identification mode.
Byte 0 (A0=V
IL
) represents the manufacturer
code, and byte 1 (A0=V
IH
), the device code. For
HT27LC512, these two identifier bytes are shown
in the Mode Select Table. All identifiers for the
manufacturer and device codes will possess odd
parity, with the MSB (DQ7) defined as the parity
bit. When A1=V
IL
, the HT27LC512 will read out
the binary code of 7F, continuation code, to signify
the unavailability of manufacturer ID codes.
Read mode
The HT27LC512 has two control functions,
both of which must be logically satisfied in or-
der to obtain data at outputs. Chip Enable (CE )
is the power control and should be used for
device selection. Output E nable (OE ) is the out-
put control and should be used to gate data to
the output pins, independent of device selec-
tion. Assuming that addresses are stable, ad-
dress access time (t
ACC
) is equal to the delay
from CE to output (t
CE
). Data is available at the
outputs (t
OE
) after the falling edge of OE , as-
suming the CE has been LOW and addresses
have been stable for at least t
ACC
-t
OE
.
Standby mode
The HT27L C512 has CMOS standby mode
which reduces the maximum VCC current to
10
μ
A. It is placed in CMOS standby when CE is
at V
CC
±
0.3V. The HT27LC512 also has a TTL-
standby mode which reduces the maximum
VCC current to 0.6mA. It is placed in TTL-
standby when CE is at V
IH
. When in standby
mode, the outputs are in a high-impedance
state, independent of the OE input.
Two-line output control function
To accommodate multiple memory connections,
a two-line control function is provided to allow
for:
Low memory power consumption
Assurance that output bus contention will not
occur.
It is recommended that CE be decoded and used
as the primary device-selection function, while
OE be made a common connection to all devices
in the array and connected to the READ line
from the system control bus. This assures that
all deselected memory devices are in their low-
power standby mode and that the output pins
are only active when data is desired from a
particular memory device.
System considerations
During the switch between active and standby
conditions, transient current peaks are pro-
duced on the rising and falling edges of Chip
E nable. The magnitude of these transient cur-
rent peaks is dependent on the output capaci-
tance loading of the device. At a minimum, a
0.1
μ
F ceramic capacitor (high frequency, low
inherent inductance) should be used on each
device between VCC and VPP to minimize tran-
sient effects. In addition, to overcome the volt-
age drop caused by the inductive effects of the
printed circuit board traces on E PROM arrays,
a 4.7
μ
F bulk electrolytic capacitor should be
used between VCC and VPP for each eight de-
vices. The location of the capacitor should be
close to where the power supply is connected to
the array.
HT27LC512
7
6th May ’99
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