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參數(shù)資料
| 型號： | HSP50215VC |
| 廠商： | INTERSIL CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Digital UpConverter |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PQFP100 |
| 封裝： | 14 X 20 MM, MQFP-100 |
| 文件頁數(shù)： | 16/21頁 |
| 文件大小： | 157K |
| 代理商： | HSP50215VC |
3-437
Configuration Control Register Bit Definitions
CONTROL ADDRESS 0: I CHANNEL INPUT
BIT
POSITION
FUNCTION
DESCRIPTION
15-0
I Channel QASK Input or
FM Input
IIN(15:0). In QASK mode, this is the I input vector. The format is 2’s complement. The MSB is bit 15.
The mixer operation is:
OUT = (I*COS) - (Q*SIN).
In FM mode, this is interpreted as an offset frequency to the center frequency. The modulation index
depends on the mode and the filter coefficients. In FM with post filter mode, the phase change per
input sample can range from -180 to 180 degrees, so the deviation is limited to
±
(input sample rate)/2.
CONTROL ADDRESS 1: Q CHANNEL INPUT
BIT
POSITION
FUNCTION
DESCRIPTION
15-0
Q Channel Input
QIN(15:0). In QASK mode, this is the Q input vector. See address 0 above. In FM mode, this input is
not used.
CONTROL ADDRESS 2: TIMING NCO FREQUENCY MSBYTE CONTROL WORD
BIT
POSITION
FUNCTION
DESCRIPTION
15-14
Reserved (Note 1)
Reserved (Note 1).
13-0
Sample Rate Ratio’s
Most Significant 14 Bits
SR(29:16). The sample rate is controlled by a 30-bit NCO clocked at the output clock rate. The upper
MSByte of the sample rate ratio SR(29:0), or SR(29:16), is loaded in this address. The sample rate is
computed by the formula:
F
RESAMP
= SR(29:0) x f
CLK
x 2
-32
; SR (29:0) = INT[(F
RESAMP
/f
CLK
) X 2
32
].
CONTROL ADDRESS 3: TIMING NCO FREQUENCY LSBYTE CONTROL WORD
BIT
POSITION
FUNCTION
DESCRIPTION
15-0
Sample Rate Ratio’s
Least Significant 16 Bits
SR(15:0). See Control Address 2. SR(15:0) is loaded in this address.
CONTROL ADDRESS 4: CARRIER CENTER FREQUENCY MSBYTE CONTROL WORD
BIT
POSITION
FUNCTION
DESCRIPTION
15-0
Carrier Center
Frequency’s Most
Significant 16 Bits
CF(31:16). The SIN/COS ROM is controlled by a 32-bit NCO clocked at the input clock rate. The upper
MSByte of the sample rate ratio CF(31:0), or CF(31:16), is loaded in this address. The center frequen-
cy is computed by the formula:
f
C
= CF(31:0) x f
CLK
x 2
-32
; CF(31:0) = INT(f
C
/f
CLK
X 2
32
). Setting CW 4 and 5 to zero bypasses the
mixers (COS = 1; SIN = 0).
CONTROL ADDRESS 5: CARRIER CENTER FREQUENCY LSBYTE CONTROL WORD
BIT
POSITION
FUNCTION
DESCRIPTION
15-0
Carrier Center
Frequency’s Least
Significant 16 Bits
CF(15:0). See Control Address 4. CF(15:0) is loaded in this address. Setting CW 4 and 5 to zero by-
passes the mixers (COS = 1; SIN = 0).
CONTROL ADDRESS 16: MODULATION CONTROL
BIT
POSITION
FUNCTION
DESCRIPTION
15-4
Reserved (Note 1)
Reserved (Note 1).
3
Enable Output
EN OUT.
HSP50215
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HSP50215VI | Digital UpConverter |
| HSP50215EVAL | DSP Modulator Evaluation Board |
| HSP50215 | Digital UpConverter(數(shù)字上變頻器) |
| HSP50216 | Four-Channel Programmable Digital DownConverter(四通道可編程數(shù)字下變頻器) |
| HSP50307 | Burst QPSK Modulator(混合信號QPSK調(diào)制器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HSP50215VI | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Digital UpConverter |
| HSP50216 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Four-Channel Programmable Digital Downconverter |
| HSP50216_06 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Four-Channel Programmable Digital DownConverter |
| HSP50216_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Four-Channel Programmable Digital Downconverter |
| HSP50216KI | 功能描述:上下轉(zhuǎn)換器 MULTI-CHANNEL PROGRAMMABLE DOW CONVERTER,BGA PKG,IND TEMP RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128 |
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