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參數(shù)資料
| 型號(hào)： | HSP45314VI |
| 廠商： | INTERSIL CORP |
| 元件分類： | 數(shù)字信號(hào)處理外設(shè) |
| 英文描述： | CommLinkTM Direct Digital Synthesizer |
| 中文描述： | 8-BIT, DSP-NUM CONTROLLED OSCILLATOR, PQFP48 |
| 封裝： | 7 X 7 MM, LQFP-48 |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 118K |
| 代理商： | HSP45314VI |
3-14
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (321) 724-7000
FAX: (321) 724-7240
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
12
7:1
Bits 7 through 1 are Intersil reserved for future serial input control. Do Not Change.
00 h
0
Center Frequency Enable. 1 = enable, 0 = center frequency disabled.
This bit can be used to zero the center frequency (CF(47:0)) to the phase accumulator. This does not zero
the processor interface registers - just the data path from the registers to the phase accumulator.
1 b
13
7:0
NCO control word.
F8 h
7
Intersil reserved. Do Not Change.
1 b
6
Intersil Reserved. Do Not Change. Future Serial output frequency register enable.
1 b
5
Phase accumulator feedback. 0 = accumulator feedback disabled, 1 = accumulator enabled.
1 b
4:0
Intersil reserved. Do Not Change.
11000 b
14
7:0
User should write 30 h to address 14 after RESET.
10 h
5:4
NCO-to-DAC setup and hold time control. Set to 11b.
01 b
Control Register Description
(Continued)
ADDRESS
BITS
DESCRIPTION
RESET
STATE
HSP45314
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| HSP48212VC-40 | Digital Video Mixer |
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| HSP48212 WAF | 制造商:Intersil Corporation 功能描述: |
| HSP48212JC-40 | 制造商:Rochester Electronics LLC 功能描述:DIGITAL VIDEO MIXER 68PLCC 40MHZ COMM - Bulk |
| HSP48212VC-40 | 制造商:Harris Corporation 功能描述: 制造商:Intersil Corporation 功能描述: |
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