參數(shù)資料
型號(hào)： HSP45314
廠商： Intersil Corporation
元件分類： XO, clock
英文描述： CommLinkTM Direct Digital Synthesizer
中文描述： CommLinkTM直接數(shù)字頻率合成器
文件頁數(shù)： 6/14頁
文件大?。?/td> 118K
代理商： HSP45314
3-6
Absolute Maximum Ratings
Thermal Information
Digital Supply Voltage DV
DD
to DGND . . . . . . . . . . . . . . . . . . +5.5V
Analog Supply Voltage AV
DD
to AGND . . . . . . . . . . . . . . . . . . +5.5V
Grounds, AGND To DGND. . . . . . . . . . . . . . . . . . . . .-0.3V To +0.3V
Digital Input Voltages . . . . . . . . . . . . . . . . . . . . . . . . . DV
DD
+ 0.3V
Reference Input Voltage Range. . . . . . . . . . . . . . . . . . AV
DD
+ 0.3V
Analog Output Current (I
OUT
) . . . . . . . . . . . . . . . . . . . . . . . . . 24mA
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Thermal Resistance (Typical, Note 1)
LQFP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
θ
JA
(
o
C/W)
68
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
AV
DD
= DV
DD
= +5V (unless otherwise noted), V
REF
= Internal 1.2V, IOUTFS = 20mA,
T
A
= 25
o
C for All Typical Values
PARAMETER
TEST CONDITIONS
HSP45314
T
A
= -40
o
C TO 85
o
C
UNITS
MIN
TYP
MAX
DAC CHARACTERISTICS
DAC Resolution
14
-
-
Bits
Integral Linearity Error, INL
“Best Fit” Straight Line (Note 7)
-5
+
2.5
+6
LSB
Differential Linearity Error, DNL
(Note 7)
-2
+
1.5
+4
LSB
Offset Error, I
OS
(Note 7)
-0.025
+0.025
% FSR
Offset Drift Coefficient
(Note 7)
-
0.1
-
ppm
FSR/
o
C
Full Scale Gain Error
With Internal Reference (Notes 2, 7)
-10
±
1
+10
% FSR
Full Scale Gain Drift
With Internal Reference (Note 7)
-
±
50
-
ppm
FSR/
o
C
Full Scale Output Current
(Note 3)
2
-
20
mA
Output Voltage Compliance Range
(Note 3, 7)
-1.0
-
1.25
V
DAC DYNAMIC CHARACTERISTICS
Maximum Clock Rate, f
CLK
+5V DV
DD
, +5V AV
DD
(Note 3)
125
-
-
MSPS
Maximum Clock Rate, f
CLK
+3.3V DV
DD
, +5V AV
DD
(Note 3)
100
-
-
MSPS
Output Settling Time, (t
SETT
)
±
0.05% (
±
8 LSB) (Note 7)
-
35
-
ns
Output Rise Time
Full Scale Step
-
2.5
-
ns
Output Fall Time
Full Scale Step
-
2.5
-
ns
Output Capacitance
-
25
-
pF
Output Noise
IOUTFS = 20mA
-
50
-
pA/
√
Hz
IOUTFS = 2mA
-
30
-
pA/
√
Hz
HSP45314
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