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參數(shù)資料
| 型號(hào)： | HS0-5104ARH-Q |
| 廠商： | INTERSIL CORP |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Radiation Hardened Low Noise Quad Operational Amplifier |
| 中文描述： | QUAD OP-AMP, 3000 uV OFFSET-MAX, 8 MHz BAND WIDTH, UUC14 |
| 封裝： | DIE-14 |
| 文件頁(yè)數(shù)： | 3/3頁(yè) |
| 文件大?。?/td> | 38K |
| 代理商： | HS0-5104ARH-Q |
3
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
http://www.intersil.com
Die Characteristics
DIE DIMENSIONS:
95 mils x 99 mils x 19 mils
±
1 mils
(2420
μ
m x 2530
μ
m x 483
μ
m
±
25.4
μ
m)
INTERFACE MATERIALS:
Glassivation:
Type: Nitride (SI3N4) over Silox (SIO2, 5% Phos.)
Silox Thickness: 12k
±
2k
Nitride Thickness: 3.5k
±
1.5k
Top Metallization:
Type: Al, 1% Cu
Thickness: 16k
±
2k
Substrate:
Bipolar Dielectric Isolation
Backside Finish:
Silicon
ASSEMBLY RELATED INFORMATION:
Substrate Potential
(Powered Up)
:
Unbiased
ADDITIONAL INFORMATION:
Worst Case Current Density:
<2.0 x 10
5
A/cm
2
Transistor Count:
175
Metallization Mask Layout
HS-5104ARH
+IN2
V+
+IN1
-IN1
OUT1
OUT4
-IN4
-IN3
OUT3
OUT2
-IN2
+IN4
V-
+IN3
HS-5104ARH
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