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參數(shù)資料
| 型號： | HMS91C7432 |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | HMS91C7432 features and functions |
| 中文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁數(shù)： | 75/90頁 |
| 文件大小： | 1557K |
| 代理商： | HMS91C7432 |
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HMS9xC7132 / HMS9xC7134
May.2001 ver1.1
71
20. ANALOG-TO-DIGITAL CONVERTOR (ADC)
The analog to digital converter (A/D) allows conversion of an an-
alog input to a corresponding 8-bit digital value. TheA/D module
has four analog inputs, which are multiplexed into one sample
and hold. The output of the sample and hold is the input into the
converter, which generates the result via successive approxima-
tion. The analog supply voltage is connected to VDD2 of ladder
resistance of A/D module.
The A/D module has two registers which are the control register
ACON and A/D result register ADAT. The register ACON,
shown in Table 17.1, controls the operation of the A/D converter
module. To use analog inputs, I/O is selected by P1SFS register.
The processing of conversion starts when the start bit ADST is set
to “1”. After one cycle, it is cleared by hardware. The register
ADAT contains the results of the A/D conversion. When conver-
sion is completed, the result is loaded into the ADAT the A/D
conversion status bit ADSF is set to “1”.
The block diagram of the A/D module is shown in Fig. 17.1. The
A/D status bit ADSF is set automatically when A/D conversion is
completed, cleared when A/D conversion is in process. The con-
version time takes maximum 13us (@12MHz)
Figure 20-1 A/D block diagram
Input
MUX
ACH0
ACH1
ACH2
ACH3
ACON
INTERNAL BUS
ADAT
VDD2
Ladder
Resistor
Decoder
S/H
Successive
Approximation
Circuit
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