參數(shù)資料
型號: HMP8117
廠商: Intersil Corporation
英文描述: NTSC/PAL Video Decoder
中文描述: NTSC / PAL視頻解碼器
文件頁數(shù): 15/45頁
文件大?。?/td> 269K
代理商: HMP8117
15
.
Advanced Features
In addition to digitizing an analog video signal the HMP8117
has hardware to process different types of Vertical Blanking
Interval (VBI) data as described in the following sections.
“Sliced” VBI Data Capture
The HMP8117 implements “sliced” data capture of select
types of VBI data. The VBI decoders incorporate detection
hysteresis to prevent them from rapidly turning on and off
due to noise and transmission errors. In order to handle real-
world signals, the VBI decoders also compensate for DC
offsets and amplitude variations.
Closed Captioning
During closed captioning capture, the scan lines containing
captioning information are monitored. If closed captioning is
enabled and captioning data is present, the caption data is
loaded into the caption data registers.
DETECTION OF CLOSED CAPTIONING
The closed caption decoder monitors the appropriate scan
lines looking for the clock run-in and start bits used by
captioning. If found, it locks to the clock run-in, the caption
data is sampled and loaded into shift registers, and the data
is then transferred to the caption data registers.
If the clock run-in and start bits are not found, it is assumed
the scan line contains video data unless other VBI
information is detected, such as teletext.
Once the clock run-in and start bits are found on the
appropriate scan line for four consecutive odd fields, the
Closed Captioning odd field Detect status bit is set to “1”. It
is reset to “0” when the clock run-in and start bits are not
found on the appropriate scan lines for four consecutive odd
fields.
Once the clock run-in and start bits are found on the
appropriate scan line for four consecutive even fields, the
Closed Captioning even field Detect status bit is set to “1”. It
is reset to “0” when the clock run-in and start bits are not
found on the appropriate scan lines for four consecutive even
fields.
CLK
DVALID
BLANK
P[15-8]
t
DVLD
FF
00
00
Cb
0
Y
0
Cr
0
Status
Y
1
Cb
2
NOTES:
16. Y
0
is the first active luminance pixel data of a line. Cb
0
and Cr
0
are first active chrominance pixel data in a line. Cb and Cr will alternate
every cycle due to the 4:2:2 subsampling. Pixel data is not output during the blanking period.
17. Notice that DVALID is not asserted during the preamble and that BLANK is still asserted.
18. See table 5 for Status bit definitions.
FIGURE 14. OUTPUT TIMING FOR 8-BIT BT.656 MODE
TABLE 5. BT.656 EAV AND SAV SEQUENCES
Y
2
PIXEL INPUT
P15
P14
P13
P12
P11
P10
P9
P8
Preamble
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Status Word
1
F
V
H
P3
P2
P1
P0
NOTES:
19. P3 = V xor H; P2 = F xor H; P1 = F xor V; P0 = F xor V xor H
20. F: “0” = field 1; “1” = field 2
21. V: “1” during vertical blanking
22. H: “0” at SAV (start of active video); “1” at EAV (end of active video)
HMP8117
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