參數(shù)資料
型號(hào): HMP8116CN
廠商: HARRIS SEMICONDUCTOR
元件分類: 顏色信號(hào)轉(zhuǎn)換
英文描述: NTSC/PAL Video Decoder
中文描述: COLOR SIGNAL DECODER, PQFP80
文件頁(yè)數(shù): 42/43頁(yè)
文件大小: 182K
代理商: HMP8116CN
42
Luminance Nonlinearity
NTC-7 Composite (Note 2)
-
2
-
%
SNR
SNRL
WEIGHTED
Pedestal Input (Note 2)
-
50
-
dB
GENLOCK PERFORMANCE
Horizontal Locking Time
t
LOCK
Time from Initial Lock
Acquisition to an Error of
1 Pixel. (Note 2)
2
3
-
Fields
Long-Term horizontal Sync
Lock Range
Range over specified pixel jitter
is maintained. Assumes line
time changes by amount indicat-
ed slowly between over one
field. (Note 2)
-
-
5
%
Number of Missing Horizontal
Syncs
Before Lost Lock Declared
H
SYNC LOST
Programmable via register 04
H
(Note 2)
1 or 12
1 or 12
1 or 12
Hsyncs
Number of Missing Vertical Syncs
Before Lost Lock Declared
V
SYNC LOST
1 or 3
1 or 3
1 or 3
Vsyncs
Long-Term Color Subcarrier
Lock Range
Range over color subcarrier
locking time and accuracy spec-
ifications are maintained. Sub-
carrier frequency changes by
amount indicated slowly over 24
hours. (Note 2)
-
±
200
±
400
Hz
Vertical Sample Alignment
(Notes 2, 4)
-
1/8
-
Pixel
-
10
-
ns
NOTES:
2. Guaranteed by design or characterization.
3. Test performed with C
L
= 40pF, I
OL
= 4mA, I
OH
= -4mA. Input reference level is 1.5V for all inputs. V
IH
= 3.0V, V
IL
= 0V.
4. This should not be confused with Clock Jitter, since the HMP8116 does not generate the sample clock. Thus, clock jitter is solely depen-
dent on the source of the CLK2 signal. The Vertical Sample Alignment parameter specifies how accurately samples align vertically from
one scan line to the next.
Electrical Specifications
V
CC
= V
AA
= 5.0V, T
A
= 25
o
C
(Continued)
PARAMETER
SYMBOL
TEST CONDITION
MIN
TYP
MAX
UNITS
HMP8116
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