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參數(shù)資料
| 型號： | HIP9011AB |
| 廠商： | INTERSIL CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Engine Knock Signal Processor |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO20 |
| 封裝： | PLASTIC, MS-013-AC, SOIC-20 |
| 文件頁數(shù)： | 4/11頁 |
| 文件大?。?/td> | 76K |
| 代理商： | HIP9011AB |
4-4
INPUT AMPLIFIERS
CH0 and CH1 High Output Voltage
V
OUT
HI
I
SINK
= 100
μ
A, V
DD
= 5.0V
4.7
4.9
-
V
CH0 and CH1 Low Output Voltage
V
OUT
LO
I
SOURCE
= 100
μ
A; V
DD
= 5.0V
-
15
200
mV
Voltage Gain
A
CL
Input R = 47.5K, Feedback
R = 475k
+18
+20
+21
dB
ANTIALIASING FILTER
Response 1kHz to 20kHz, Referenced to 1kHz
BW
Test Mode
-
-0.5
-
dB
Attenuation at 180kHz, Referenced
to 1kHz
ATTEN
Test Mode
-10
-15
-
dB
PROGRAMMABLE FILTERS
Peak to Peak Voltage Output
V
OUT
Run Mode
3.5
4.0
-
V
P-P
Filters Q (Note 2)
Q
Run Mode
-
2.5
-
Q
PROGRAMMABLE GAIN AMPLIFIERS
Percent Amplifier Gain Deviation
%G
Run Mode
-
±
1
-
%
INTEGRATOR
Integrator Reset Voltage
V
RESET
Pin 4 Voltage at Start of
Integration
Cycle; V
DD
= 5.0V
75
125
175
mV
Integrator Droop after 500
μ
s
V
DROOP
Hold Mode, Pin 7 = 0V,
V
DD
= 5.0V
Pin 4 set to 20% to 80% of V
DD
-
±
3
±
50
mV
DIFFERENTIAL CONVERTER
Differential to Single Ended Converter Offset
Voltage
DIFV
IO
By Design
-
0.1
-
mV
Change In Converter Output
DIFOUT
Run Mode, 500
μ
A Sinking Load
to No Load Condition
-
±
1
±
10
mV
SYSTEM GAIN DEVIATION
Gain Deviation from “Ideal Equation” Correlation
Factor + 5.0% (Note 3)
V
OUT
-
V
RESET
Run Mode, maximum signal
output from Input Amplifier
<2.25V
P-P
, Equation Output X
0.95 + Device Reset Voltage;
For Total V
OUT
≤
4.7V
-8%,
±
100mV
Equa-
tion
X 0.95
- V
RE-
SET
8%,
±
100mV
V
NOTES:
2. Q = fo/BW, where: fo = Center Frequency, BW = 3dB Bandwidth
3. Ideal Equation: INTOUT (Volts) = [V
IN
* G
IN
* G
PR
* G
BPF
* 1/
π
* (N/t
C
(ms)
*
f
Q
(kHz)) * G
DSE
] + V
RESET
Where: V
IN
= input signal amplitude (V
P-P
)
G
IN
=External Input Gain; GIN = R
F
/R
IN
G
PR
=Programmed Gain
G
BPF
=Gain of Bandpass Filter (2 for Ideal Case at Center)
t
INT
=Integration Time; t
INT
= N/f
Q
0.318 =1/
π
N =Number of Cycles of Input Signal
f
Q
=Frequency of Input Signal
R
F
=Feedback Resistor Value
R
IN
=Signal Input Resistor Value
t
C
=Programmed Time Constant
G
DSE
=Gain of DSE Converter (2 for Ideal Case)
V
RESET
=Integrator Reset Voltage = 0.125V, Typ
Electrical Specifications
V
DD
= 5V
±
5%, GND = 0V, Clock Frequency 4MHz
±
0.1%, T
A
= -40
o
C to 125
o
C,
Unless Otherwise Specified
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
HIP9011
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