
4-8
4. Integrator Time Constant: Defines the Integration Time
Constant for the system. The first 3 bits are used for the
address and the last 5 bits for the value. 110TTTTT
Example: 11000011 would be the integrator time
constant (110 on for the first 3 bits) and an integration
constant of 55
μ
s (bit value of 3 in Table 2).
5. Test/ChannelSelect/ChannelAttenuateControl:Thisword
serves several purposes. By looking at the structure,
111T
A
T
B
T
C
C
S
C
A
, the first 3 bits are used for the address,
and the last 5 bits are used for the value. The options are:
- If CS is “0” channel “0” is selected. If CS is “1” channel “1”
is selected.
- If C
A
is “0” attenuation applies to the knock filter. If C
A
is
“1” attenuation applies to the reference filter.
- During the test mode (TEST input is a low level), if T
A
is “0”
all sections get their input from the output of the
antialiasing filter input. This input can come from either the
output of channel “0” amplifier or channel “1” output
depending upon the state of the C
S
bit. If T
A
is “0” the input
amplifiers are powered down. If T
A
is set to “1” during the
test mode the chip is configured in its normal operating
state, getting inputs to all sections from previous sections.
- Combinations of T
A
, T
B
and T
C
are used to test the
different analog parts of the circuit. Table 1 shows these
combinations.Allblocksexceptfortheantialiasingfilterare
sampledviathedifferentialtosingleendedconverterinthe
test mode.
TABLE 1. SHOWING PROGRAMMING IN THE TEST MODE
TEST
PIN 14
T
A
0
T
B
0
T
C
0
C
HS
0
ANALOG OUTPUT
FROM:
0
Knock Rectifier
0
0
0
0
1
Reference
0
0
0
1
0
Knock Filter
0
0
0
1
1
Reference Filter
0
0
1
0
0
Antialias Filter(1)
0
0
1
0
1
Antialias Filter(1)
0
0
1
1
0
Integrator
0
0
1
1
1
Integrator
0
1
0
0
0
Knock Rectifier
0
1
0
0
1
Reference
0
1
0
1
0
Knock Filter
0
1
0
1
1
Reference Filter
0
1
1
0
0
Antialias Filter(1)
0
1
1
0
1
Antialias Filter(1)
0
1
1
1
0
Integrator
0
1
1
1
1
Integrator
1
x
x
x
x
Integrator
NOTE:
3. AllTestfunctionblockshavetheiroutputsbufferedbythedifferential
to single ended converter. Their outputs are available at the
INTOUT pin 4 of the chip. In the case of the antialias filter test
function,theoutput istakendirectlytotheINTOUTpin 4ofthechip.
FIGURE 4A. S0IN AND S1IN INPUT CIRCUIT
FIGURE 4B. MISO OUTPUT OF SPI DATA BUS IS AN OPEN
DRAIN TRANSISTOR
FIGURE 4C. TEST PMOS TRANSISTOR HAS EQUIVALENT
CURRENT PULLUP CAPABILITY OF A 50k TO
200k RESISTOR
FIGURE 4D. S0FB, S1FB AND INOUT EQUIVALENT OUTPUT
CIRCUITS
FIGURE 4. INTERFACE CIRCUITS
S0IN
S1IN
TO NEXT STAGE
HALF OF
DIFFERENTIAL
AMPLIFIER
V
DD
MISO
11
V
DD
TEST
14
TO LOGIC
50
μ
A
V
DD
S0FB S1FB
INOUT
HIP9010