參數(shù)資料
型號(hào)： HIP9010
廠商： Intersil Corporation
英文描述： Engine Knock Signal Processor
中文描述： 發(fā)動(dòng)機(jī)爆震信號(hào)處理器
文件頁(yè)數(shù)： 3/12頁(yè)
文件大?。?/td> 81K
代理商： HIP9010
4-3
Absolute Maximum Ratings
Thermal Information
DC Logic Supply, V
DD
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Output Voltage, V
O
. . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V (Max)
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 125
o
C
Thermal Resistance (Typical, Note 1)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Storage Temperature Range, T
STG
. . . . -65
o
C to 150
o
C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150
o
C
Maximum Lead Temperature (Soldering) . . . . . . . . . . . . . . . 300
o
C
At distance 1/16in
±
1/32in (1.59mm
±
0.79mm) from case
for 10s (Max)
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
115
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V
DD
= 5V,
±
5%, GND = 0V, Clock Frequency 4MHz,
±
0.5%, T
A
= -40
o
C to 125
o
C,
Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DC ELECTRICAL CHARACTERISTICS
Quiescent Supply Current
I
DD
V
DD
= 5.25V, GND = 0V
3
7.5
12
mA
Midpoint Voltage, Pin 3
V
MID
V
DD
= 5.0V, I
L
= 2mA Source
2.3
2.45
2.55
V
Midpoint Voltage, Pin 3
V
MID
V
DD
= 5.0V, I
L
= 0mA
2.4
2.5
2.6
V
Input Leakage, Pin 14
IL
TEST
Measured at V
DD
= 5.0V
-
-
3
μ
A
Internal Pull-Up Resistance, Pin 14
R
TEST
V
DD
= 5.0V, I Measure = 15
μ
A
30
100
200
K
Leakage of Pins 7, 8, 12 and 13
I
L
Measured at GND and V
DD
= 5V
-
-
±
3
μ
A
Low Input Voltage, Pins 7, 8, 12 and 13
V
IL
-
-
30
% of V
DD
High Input Voltage, Pins 7, 8, 12 and 13
V
IH
70
-
-
% of V
DD
Low Level Output, Pin 11
V
OL
I
SOURCE
= 4mA
0.01
-
0.30
V
Leakage Pin 11
I
L
Measured at GND and V
DD
= 5V
-
-
±
10
μ
A
Low Level Output, Pin 10
V
OL
I
SOURCE
= 500
μ
A, V
DD
= 5V
-
-
1.5
V
High Level Output, Pin 10
V
OH
I
SINK
= -500
μ
A, V
DD
= 5V
4.4
-
-
V
INPUT AMPLIFIERS
S0FB and S1FB High Output Voltage
V
OUT
HI
100
μ
A I
SINK
, V
DD
= 5V
4.7
4.9
-
V
S0FB and S1FB Low Output Voltage
V
OUT
LO
100
μ
A I
SOURCE
, V
DD
= 5V
-
15
200
mV
S0FB and S1FB Closed Loop
A
CL
Input Resistor = 1M
,
Feedback Resistor = 49.9k
-25
-26
-27
dB
S0FB and S1FB Closed Loop
A
CL
Input Resistor = 47.5k
,
Feedback Resistor = 475k
18
20
21
dB
ANTIALIASING FILTER
Response 1kHz to 20kHz,
Referenced to 1kHz
BW
Test Mode, 70mV
RMS
Input to S0FB or
S1FB, Output Pin 4
-
-2
-
dB
Attenuation at 180kHz
Referenced to 1kHz
ATEN
Test Mode, 70mV
RMS
Input to S0FB or
S1FB, Output Pin 4
-10
-15
-
dB
PROGRAMMABLE FILTERS
Peak to Peak Voltage Output
V
OUTP-P
Run Mode
3.5
4.0
-
V
P-P
Filters Q (Note 2)
Q
Run Mode
-
2.5
-
Q
PROGRAMMABLE GAIN AMPLIFIERS
Percent Amplifier Gain Deviation
Per Table 2
%G
Run Mode
-
±
1
-
%
HIP9010
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