參數(shù)資料
型號(hào): HIP4020IB
廠商: INTERSIL CORP
元件分類: 運(yùn)動(dòng)控制電子
英文描述: 30000 SYSTEM GATE 3.3 VOLT LOGIC CELL AR - NOT RECOMMENDED for NEW DESIGN
中文描述: STEPPER MOTOR CONTROLLER, 1.5 A, PDSO20
封裝: PLASTIC, MS-013-AC, SOIC-20
文件頁(yè)數(shù): 3/8頁(yè)
文件大?。?/td> 65K
代理商: HIP4020IB
3
HIP4020
Response Time: V
EN
to V
OUT
Turn-On: Prop Delay
I
O
= 0.5A (Note 2)
t
PLH
-
2.5
-
μ
s
Rise Time
t
r
-
4
-
μ
s
Turn-Off: Prop Delay
t
PHL
-
0.1
-
μ
s
Fall Time
t
f
-
0.1
-
μ
s
NOTES:
1. V
SS
is the required common ground reference for the logic input switching. The load currents may be switched positive and negative in
reference to the V
SS
common ground by using a split supply for V
DD
(positive) to V
SSA
and V
SSB
(negative). For an uneven split in the
supply voltage, the Maximum Negative Output Supply Voltage for V
SSA
and V
SSB
is limited by the Maximum V
DD
to V
SSA
or V
SSB
ratings.
Since the V
DD
pins are internally tied together, the voltage on each V
DD
pins must be equal and common.
2. Refer to the Truth Table and the V
EN
to V
OUT
Switching Waveforms. Current, I
O
refers to I
OUTA
or I
OUTB
as the Output Load current. Note
that ENA controls OUTA and ENB controls OUTB. Each Half H-Switch has independent control from the respective A1, A2, ENA or B1,
B2, ENB inputs. Refer to the Terminal Information Table for external pin connections to establish mode control switching. Figure 1 shows
a typical application circuit used to control a DC Motor.
Pin Descriptions
PIN NUMBER
SYMBOL
DESCRIPTION
12, 19
V
DD
Positive Power Supply pins; internally common and externally connect to the same Positive Supply
(V+).
15
V
SSA
Negative Power Supply pin; Negative or Ground return for Switch Driver A; externally connect to the
Supply (V-).
16
V
SSB
Negative Power Supply pin; Negative or Ground return for Switch Driver B; externally connect to the
Supply (V-).
6
V
SS
Common Ground pin for the Input Logic Control circuits. May be used as a common ground with
V
SSA
and V
SSB.
8, 5
A1, B1
Input pins used to control the direction of output load current to/from OUTA and OUTB, respectively.
When connected, A1 and B1 can be controlled from the same logic signal to change the directional
rotation of a motor.
9, 3
A2, B2
Input pins used to force a low state on OUTA and OUTB, respectively. When connected, A2 and B2
can be controlled from the same logic signal to activate Dynamic Braking of a motor.
7, 4
ENA, ENB
Input pins used to Enable Switch Driver A and Switch Driver B, respectively. When Low, the respec-
tive output is in a high impedance (Z) off-state. Since each Switch Driver is independently controlled,
OUTA and OUTB may be a separately PWM controlled as Half H-Switch Drivers.
14, 17
OUTA, OUTB
Respectively, Switch Driver A and Switch Driver B Output pins.
2
ILF
Current Limiting Fault Output Flag pin; when in a high logic state, signifies that Switch Driver A or B
or both are in a Current Limiting Fault Mode.
Electrical Specifications
T
A
= 25
o
C, V
DD
= +5V, V
SSA
= V
SSB
= V
SS
= 0V, Unless Otherwise Specified
(Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
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