- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384403 > HFA3724IN (HARRIS SEMICONDUCTOR) 400MHz Quadrature IF Modulator/Demodulator PDF資料下載
參數(shù)資料
| 型號： | HFA3724IN |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 衰減器 |
| 英文描述： | 400MHz Quadrature IF Modulator/Demodulator |
| 中文描述： | MODEM |
| 文件頁數(shù)： | 17/24頁 |
| 文件大?。?/td> | 186K |
| 代理商： | HFA3724IN |
17
with their high gain, eliminate the need for additional IF gain
components. The use of interstage bandpass filtering is
suggested to decrease the noise bandwidth of the signal
driving the second stage. Excessive broadband noise
energy amplified by the first stage will force the last limiting
stage to lose some of its effective gain or “l(fā)imit on the noise”.
The use of interstage filters with narrower bandwidths will
further improve the sensitivity of the cascaded limiter chain.
The amplifier differential output impedance is 140
(70
single ended) which gives the user, the ability to design
simple wide or narrow LC bandwidth interstage filters, or
tailor a desired cascaded gain by using differential
attenuators. The filter can be designed with a desired “Q” by
using the followIng relationship: Q = Rp/X; where Rp is the
parallel combination of 140
source resistance and the load
(approximately 500
when using 560
termination as in
Figure 23, Test Diagram), and X is the reactance of either L
or C at the desired center frequency.
Another independent feature of the limiting amplifier is its
Receive Signal Strength Indicator (RSSI). A Log-Amp
design was developed which resulted in a current output
proportional to the input power. The RSSI output voltage is
set by summing the two stages output currents, which are
full wave rectified signals, to a common resistor to ground.
This full wave rectified voltage can then be converted to DC
by the use of a filter capacitor in parallel with the resistor
(The larger the capacitor value, the less the AC ripple with
the expense of longer RSSI settling times). This
arrangement gives the user the flexibility to set the dynamic
voltage swing to any desired level by an appropriate
resistance choice. Each stage has an available on chip 6K
low temperature coefficient resistor to ground for current
output termination that can be used for convenience. The
RSSI gives a
±
3dBm accurate indication of the receive input
power. This accuracy is across a 60dB input dynamic range.
The cascaded HFA3724 RSSI slope is of 5.0
μ
A/dB.
Quadrature Down Converter
The quadrature down converter mixers are based in a Gilbert
cell design. The input signal is routed to both mixers in parallel.
With full balanced differential architecture, these mixers are
driven by an accurate internal Local Oscillator (LO) chain as
described later. Phase and gain accuracy of the output
baseband signals are excellent and are a function of the
combination of LO accuracy, balanced device design and
layout characteristics. Mainly used for down conversion, its
input frequency response exceeds 400MHz with a differential
voltage gain of 2.5. With a differential input impedance of 1K
,
the input compression point exceeds 2V
P-P
, which makes it
suitable for use with the hard limiting output from the limiter
amplifier chain or any low power external AGC application. The
output frequency response is limited to 30MHz for “I” and “Q”
baseband signals driving a 4K
differential load.
The HFA3724 down conversion mixers can generate two
10MHz, 90
o
apart signals, with the use of proper low pass
filtering, and exhibits
±
4
o
and
±
0.5dB of phase and
amplitude match for a input CW IF signal of 400MHz and a
2XLO input of 780MHz.
LO Quadrature Generator
The In Phase and Quadrature reference signals are
generated by a divide by two chain internal to the device
which drives both the up and down conversion mixers. With
a fully balanced approach, the phase relationship between
the two quadrature signals is within 90
o
±
4
o
for a wide 10 to
400MHz frequency range. The reference signal input
frequency needs to be twice the desired internal reference
frequency. The ground referenced 2XLO input is current
driven, which makes the input power requirement a function
of external components that can be calculated assuming the
input impedance of 130
. A typical input current value of
200
μ
A
RMS
is the only requirement for reliable LO
generation. Figure 24 shows a typical 2XLO input network.
Divide by two flip flop architectures for LO generation often
require tight control of signal purity or duty cycles. The
HFA3724 has an internal duty cycle compensation scheme
which eases the requirements of tight controlled duty cycles.
In addition, a 50
LO buffer is available to the user for PLLs
design reference. It substitutes a divide by two prescaler
needed to bring the 2X LO frequency reference down. It is
capable to drive 100mV
P-P
into 50
and its frequency
response is from 10MHz to 400MHz corresponding to a
2XLO input frequency response of 20MHz to 800MHz. The
LO buffer can be disabled by removing the ground
connection to the pin LO GND. The quadrature generator is
always enabled for either transmit or receive modes.
EQUIVALENT
130
I RMS = 200
μ
A
50
220
56
47p
44
FIGURE 24. MOD LO IN (2XLO) EQUIVALENT CIRCUIT
HFA3724
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HFA3724IN96 | 400MHz Quadrature IF Modulator/Demodulator |
| HFA3761 | 400MHz AGC and Quadrature IF Demodulator |
| HFA3761IN | 400MHz AGC and Quadrature IF Demodulator |
| HFA3763 | 288 MACROCELL 3.3 VOLT ISP CPLD |
| HFA3763IN | 288 MACROCELL 3.3 VOLT ISP CPLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HFA3724IN96 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HFA3724INS2539 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HFA3725R3417 | 制造商:Harris Corporation 功能描述: |
| HFA3726 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:400MHz Quadrature IF Modulator/Demodulator |
| HFA3726/3728 WAF | 制造商:Harris Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。