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參數(shù)資料
| 型號： | HFA3724IN |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 衰減器 |
| 英文描述： | 400MHz Quadrature IF Modulator/Demodulator |
| 中文描述： | MODEM |
| 文件頁數(shù)： | 10/24頁 |
| 文件大?。?/td> | 186K |
| 代理商： | HFA3724IN |
10
IF Demodulator RSSI DC Level, Pin = -30dBm (Note 15)
Drssi_30
A
Full
0.90
1.46
1.71
V
DC
IF Demodulator RSSI DC Level, Pin = -70dBm (Note 15)
Drssi_70
A
Full
0.456
0.86
0.99
V
DC
IF Demodulator RSSI Linear Dynamic Range (Note 16)
Drssidr
B
25
-
60
-
dB
IF Demodulator RSSI Rise and Fall Time from -30dBm to
-50dBm Input at 100pF Load
Drssitr
B
25
-
0.3
-
μ
s
NOTES:
12. A = Production Tested, B = Based on Characterization, C = By Design
13. 2XLO input = 572MHz, measure IF input level required to drop the I and Q output at 6MHz by 3dB from a reference output generated at IF input
= -30dBm (hard limiting). LPF selected for 8.8MHz. This is a noise limited case with a BW of 47MHz. Please refer to the Overall Device
Description, IF limiter.
14. The residual DC voltage generated by the RSSI circuit due to a noise limited stage at the end of the chain with no IF input. IF port terminated
into 50
. Please referred to the Overall Device Description, IF limiter.
15. Both limiter RSSI current outputs are summed by on chip 6K
resistors in parallel.
16. Range is defined where the indicated received input strength by the RSSI is
±
3dBm accurate.
AC Electrical Specifications, Demodulator Performance
Application Targeting IEEE 802.11, V
CC
= 3V, Figure 23
Unless Otherwise Specified
(Continued)
PARAMETER
SYMBOL
(NOTE 12)
TEST
LEVEL
TEMP
(
o
C)
MIN
TYP
MAX
UNITS
AC Electrical Specifications, Modulator Performance
Application Targeting IEEE 802.11, V
CC
= 3V, Figure 23
Unless Otherwise Specified
PARAMETER
SYMBOL
(NOTE 17)
TEST
LEVEL
TEMP
(
o
C)
MIN
TYP
MAX
UNITS
IF Modulator I/Q Amplitude Balance (Note 18)
Mabal
B
25
-1.0
0
+1.0
dB
IF Modulator I/Q Phase Balance (Note 18)
Mphbal
B
25
-4.0
0
+4.0
Degrees
IF modulator SSB Output Power (Note 19)
Mssbpw
A
Full
-12
-7
-4
dBm
IF Modulator Side Band Suppression (Note 19)
Mssbss
A
Full
26
33
-
dBc
IF Mod Carrier Suppression (LO Buffer Enabled) (Note 19)
Mssbcs
A
Full
28
30
-
dBc
IF Mod Carrier Suppression (LO Buffer Disabled) (Note 19)
Mssbcs1
B
25
28
36
-
dBc
IF Modulator Output Noise Floor (Out of Band)
Moutn0
B
25
-
-132
-
dBm/Hz
IF Modulator I/Q 3dB Cutoff SEL0/1 = 2.2MHz (Note 20)
Msel1f
A
Full
1.8
2.2
2.5
MHz
IF Modulator I/Q 3dB Cutoff SEL0/1 = 4.4MHz (Note 20)
Msel2f
A
Full
3.6
4.4
5.0
MHz
IF Modulator I/Q 3dB Cutoff SEL0/1 = 8.8MHz (Note 20)
Msel3f
A
Full
7.3
8.8
9.8
MHz
IF Modulator I/Q 3dB Cutoff SEL0/1 = 17.6MHz (Note 20)
Msel4f
A
Full
14.6
17.6
19.6
MHz
IF Modulator Spread Spectrum Output Power (Note 21)
Mdsspw
B
25
-12
-7
-4
dBm
IF Modulator Side Lobe to Main Lobe Ratio, LPF = 8.8MHz
(Note 21)
Mdsssl
B
25
-
35
-
dB
NOTES:
17. A = Production Tested, B = Based on Characterization, C = By Design
18. Data is characterized by DC levels applied to MOD TXI and Q pins for 4 quadrants with LO output as reference or indirectly by the SSB
characteristics.
19. Power at the fundamental SSB frequency of two 6MHz, 90 degrees apart square waves applied at TXI and TXQ inputs. V
IH
= 3.0V,
V
IL
= 0.5V. LPF selected to 8.8MHz cutoff.
20. Cutoff frequencies are specified for both modulator and demodulator as the filter bank is shared and multiplexed for Transmit and Receive. Data
is characterized by observing the attenuation of the fundamental of a square wave digital input swept at each channel separately. The IF output
is down converted by an external wideband mixer with a coherent LO input for each of quadrature signals separately.
21. Typical ratio characterization with R
TUNE
set to 7.7MHz, LPF selected for 8.8MHz. TXI and TXQ Digital Inputs at two independent and aligned
11M chip/s, 2
23
-1 sequence code signals.
HFA3724
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