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參數(shù)資料
| 型號： | HD74CDC857 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 3.3/2.5-V Phase-lock Loop Clock Driver |
| 中文描述： | 3.3/2.5-V鎖相環(huán)時鐘驅(qū)動器 |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 54K |
| 代理商： | HD74CDC857 |
HD74CDC857
3
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Conditions
Supply voltage
V
DDQ
V
I
V
O
–0.5 to 4.6
V
Input voltage
–0.5 to 4.6
V
Output voltage
*1
–0.5 to V
DDQ
+0.5
V
Input clamp current
I
IK
I
OK
I
O
I
VDDQ
or I
GND
–50
mA
V
I
< 0
V
O
< 0
V
O
= 0 to V
DDQ
Output clamp current
–50
mA
Continuous output current
±
50
±
100
mA
Supply current through each V
DDQ
or GND
Maximum power dissipation
at Ta = 55
°
C (in still air)
mA
0.7
W
Storage temperature
Notes:
T
stg
–65 to +150
°
C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage
to the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp
current ratings are observed.
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