
9.2  Port 1
9.2.1  Overview
Port 1 is an 8-bit input/output port with the pin configuration shown in figure 9-1.  All pins have
dual functions, except that in the single-chip mode pins 4, 3, and 2 do not have the WAIT, BREQ,
and BACK functions (because the CPU does not access an external bus).
Outputs from port 1 can drive one TTL load and a 90 pF capacitive load.  They can also drive a
Darlington transistor pair.
9.2.2  Port 1 Registers
Register Configuration:  
Table 9-2 lists the registers of port 1.
Table 9-2   Port 1 Registers
Name
Port 1 data direction register
Port 1 data register
System control register 1
Abbreviation
P1DDR
P1DR
SYSCR1
Read/Write
W
R/W
*
1
R/W
Initial Value
H'03
Undetermined
*
2
H'87
Address
H'FE80
H'FE82
H'FEFC
*
1  Bits 1 and 0 are read-only.
*
2  Bits 1 and 0 are undetermined.  Other bits are initialized to 0.
Pin
P1
7
 / TMO
P1
6
 / IRQ
1
 / P1
6
 (input/output) / IRQ
1
 (input) /
ADTRG
ADTRG (input)
P1
5
 / IRQ
0
P1
5
 (input/output) / IRQ
0
 (input)
P1
4
 / WAIT
P1
4
 (input/output) / WAIT (input)
P1
3
 / BREQ P1
3
 (input/output) / BREQ (input)
P1
2
 / BACK P1
2
 (input/output) / BACK (output)
P1
1
 / E
P1
1
 (input) / E (output)
P1
0
 / 
P1
0
 (input) /  (output)
Expanded Modes
P1
7
 (input/output) / TMO (output)
Single-Chip Mode
P1
7
 (input/output) / TMO (output)
P1
6
 (input/output) / IRQ
1
 (input) /
ADTRG (input)
P1
5
 (input/output) / IRQ
0
 (input)
P1
4
 (input/output)
P1
3
 (input/output)
P1
2
 (input/output)
P1
1
 (input) / E (output)
P1
0
 (input) /  (output)
Port
1
Figure 9-1   Pin Functions of Port 1
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