
iii
5.1.2
5.1.3
5.1.4
Interrupt Sources................................................................................................................ 144
5.2.1
NMI Interrupt........................................................................................................ 145
5.2.2
User Break Interrupt ............................................................................................. 145
5.2.3
H-UDI Interrupt.................................................................................................... 145
5.2.4
IRL Interrupts........................................................................................................ 145
5.2.5
IRQ Interrupts....................................................................................................... 146
5.2.6
On-chip Peripheral Module Interrupts.................................................................. 150
5.2.7
Interrupt Exception Vectors and Priority Order.................................................... 150
Register Descriptions......................................................................................................... 157
5.3.1
Interrupt Priority Level Setting Register A (IPRA).............................................. 157
5.3.2
Interrupt Priority Level Setting Register B (IPRB).............................................. 158
5.3.3
Interrupt Priority Level Setting Register C (IPRC).............................................. 159
5.3.4
Interrupt Priority Level Setting Register D (IPRD).............................................. 160
5.3.5
Interrupt Priority Level Setting Register E (IPRE)............................................... 161
5.3.6
Vector Number Setting Register WDT (VCRWDT)............................................ 162
5.3.7
Vector Number Setting Register A (VCRA)........................................................ 163
5.3.8
Vector Number Setting Register B (VCRB) ........................................................ 163
5.3.9
Vector Number Setting Register C (VCRC) ........................................................ 164
5.3.10 Vector Number Setting Register D (VCRD)........................................................ 165
5.3.11 Vector Number Setting Register E (VCRE)......................................................... 166
5.3.12 Vector Number Setting Register F (VCRF).......................................................... 167
5.3.13 Vector Number Setting Register G (VCRG)........................................................ 168
5.3.14 Vector Number Setting Register H (VCRH)........................................................ 169
5.3.15 Vector Number Setting Register I (VCRI)........................................................... 170
5.3.16 Vector Number Setting Register J (VCRJ)........................................................... 171
5.3.17 Vector Number Setting Register K (VCRK)........................................................ 172
5.3.18 Vector Number Setting Register L (VCRL)......................................................... 173
5.3.19 Vector Number Setting Register M (VCRM)....................................................... 174
5.3.20 Vector Number Setting Register N (VCRN)........................................................ 175
5.3.21 Vector Number Setting Register O (VCRO)........................................................ 176
5.3.22 Vector Number Setting Register P (VCRP).......................................................... 177
5.3.23 Vector Number Setting Register Q (VCRQ)........................................................ 178
5.3.24 Vector Number Setting Register R (VCRR) ........................................................ 179
5.3.25 Vector Number Setting Register S (VCRS).......................................................... 180
5.3.26 Vector Number Setting Register T (VCRT)......................................................... 181
5.3.27 Vector Number Setting Register U (VCRU)........................................................ 182
5.3.28 Interrupt Control Register (ICR) .......................................................................... 185
5.3.29 IRQ Control/Status Register (IRQCSR)............................................................... 186
Interrupt Operation............................................................................................................. 188
5.4.1
Interrupt Sequence................................................................................................ 188
Block Diagram...................................................................................................... 141
Pin Configuration.................................................................................................. 143
Register Configuration.......................................................................................... 143
5.2
5.3
5.4