參數資料
型號: HD49235FS
廠商: Hitachi,Ltd.
元件分類: 數字信號處理
英文描述: Digital Signal Processor for CD
中文描述: 數字信號處理器的CD
文件頁數: 26/41頁
文件大?。?/td> 192K
代理商: HD49235FS
HD49235FS
Rev.2, Aug. 1995, page 26 of 41
d. Track Counter Setting (Register B)
An internal counter counts the track-crossing signal input at the CNIN pin. When the count reaches the
value set in register B, the SENS output inverts.
Depending on the order in which registers B and C are set, tracks are counted in complete mode (once
only) or count mode (repeatedly). See the timing diagram in figure 14.
Complete mode
Step 1: Set desired values in all registers other than registers B and C.
Step 2: Set register C.
Step 3: Set the count value in register B.
Step 4: Monitor the SENS line at the microprocessor.
Step 1
Step 2
Step 3
Step 4
Microprocessor
command
XLT
CNIN
SENS
Complete mode
Count mode
n counts
n counts
n counts
n counts
Figure 14 Track Counting
Count mode
Step 1: Same as complete mode.
Step 2: Set the count value in register B.
Step 3: Set register C.
Step 4: Monitor the SENS line at the microprocessor.
Notes: 1. Do not use the microprocessor interface while the microprocessor is monitoring the SENS line.
2. If all zeros are written in register B, the count setting is 256.
3. Do not monitor the SENS pin between steps 2 and 3.
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