參數(shù)資料
型號: HD49235FS
廠商: Hitachi,Ltd.
元件分類: 數(shù)字信號處理
英文描述: Digital Signal Processor for CD
中文描述: 數(shù)字信號處理器的CD
文件頁數(shù): 23/41頁
文件大?。?/td> 192K
代理商: HD49235FS
HD49235FS
Rev.2, Aug. 1995, page 23 of 41
Microprocessor Interface
DATA:
Input pin for receiving microprocessor command data.
CLK:
Clock input pin for receiving microprocessor command data.
XLT:
Latch clock input pin for storing microprocessor command data in an internal register after serial
input.
XRST:
Input pin for clearing the microprocessor command registers.
SENS:
This output pin provides the microprocessor with the following servo information. For details,
see the microprocessor command descriptions.
The SENS signal goes low when the number of pulses input at the CNIN pin reaches a value set by
the microprocessor. Alternatively, SENS toggles between low and high each time this value is
reached.
When the constant linear velocity (CLV) servo operates in brake mode, SENS goes low to indicate
detection of an interval of 32 T or more. This indicates that braking has operated and the velocity
has fallen to 1/3 or less.
CNIN:
This pin receives track-crossing pulses from the servo IC, so that the number of tracks can be
counted.
1. Data Transfer Format
The microprocessor interface transfers serial data using three signal lines: XLT, CLK, and DATA. See
the timing diagram in figure 12. D11 to D8 specify a register address and D7 to D0 give bit values to be
set in that register.
Notes: 1. When the external reset input signal (XRST) goes low all registers are reset to their default
values. See table 1.
2. Always write 0 in the following register bits:
D2 in register 8
D3 in register E
D7 and D6 in register F
3. Always write 1 in the following register bit:
D7 in register 9
Table 1
Default Values
Register Code
D7
D6
D5
D4
D3
D2
D1
D0
8 (1000)
0
0
0
0
0
0
0
0
9 (1001)
1
0
0
0
1
1
0
A (1010)
0
0
0
0
0
0
0
0
B (1011)
0
0
0
0
0
0
0
0
C (1100)
1
1
1
0
0
0
0
1
D (1101)
0
0
0
0
0
0
0
E (1110)
0
0
0
0
0
F (1111)
0
0
0
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