參數(shù)資料
型號(hào): HCPL-316J
英文描述: 2.0 Amp Gate Drive Optocoupler with Integrated (V CE ) Desaturation Detection and Fault Status Feedback(帶集成不飽和檢測(cè)和誤差反饋的2.0 Amp門(mén)驅(qū)動(dòng)耦合器)
中文描述: 2.0安培門(mén)極驅(qū)動(dòng)光電耦合器與集成(五長(zhǎng)官)飽和檢測(cè)與故障狀態(tài)反饋(帶集成不飽和檢測(cè)和誤差反饋的2.0安培門(mén)驅(qū)動(dòng)耦合器)
文件頁(yè)數(shù): 21/32頁(yè)
文件大小: 503K
代理商: HCPL-316J
21
Figure 62. Recommended Application Circuit.
Description of Operation/
Timing
Figure 63 below illustrates input
and output waveforms under the
conditions of normal operation, a
desat fault condition, and normal
reset behavior.
Normal Operation
During normal operation, V
OUT
of
the HCPL-316J is controlled by
either V
IN+
or V
IN-
, with the IGBT
collector-to-emitter voltage being
monitored through D
DESAT
. The
FAULT output is high and the
RESET input should be held high.
See Figure 63.
Fault Condition
When the voltage on the DESAT
pin exceeds 7 V while the IGBT is
on, V
OUT
is slowly brought low in
order to “softly” turn-off the IGBT
and prevent large di/dt induced
voltages. Also activated is an
internal feedback channel which
brings the FAULT output low for
Figure 63. Timing Diagram.
the purpose of notifying the
micro-controller of the fault
condition. See Figure 63.
Reset
The FAULT output remains low
until RESET is brought low. See
Figure 63. While asserting the
RESET pin (LOW), the input pins
must be asserted for an output
low state (V
IN+
is LOW or V
IN-
is
HIGH). This may be
accomplished either by software
control (i.e. of the
microcontroller) or hardware
control (see Figures 73 and 74).
V
OUT
V
DESAT
V
IN+
FAULT
RESET
NORMAL
OPERATION
FAULT
CONDITION
RESET
V
IN+
V
IN-
V
IN-
5 V
0 V
5 V
5 V
7 V
NON-INVERTING
CONFIGURED
INPUTS
INVERTING
CONFIGURED
INPUTS
+
+
100 pF
D
DESAT
0.1
μF
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
V
E
V
LED2+
DESAT
V
CC2
V
C
V
OUT
V
EE
V
EE
V
IN+
V
IN-
V
CC1
GND1
RESET
FAULT
V
LED1+
V
LED1-
HCPL-316J
+
μC
3.3
k
0.1
μF
5 V
330 pF
R
g
V
CC2
= 18 V
V
EE
= -5 V
47
k
3-PHASE
OUTPUT
0.1
μF
0.1
μF
V
F
+
Q1
Q2
V
CE
+
V
CE
+
100
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