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HB7121B
Semiconductor Inc.
System IC SBU
CMOS IMAGE SENSOR
With 8-bit ADC
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume
any responsibility for use of circuits described. NO patent licenses are implied.
DA21000601R_1.0 - 19 - 2001 Hnix System IC SBU
(14) Pixel Bias Voltage Register (Address 34h, default:02h, R/W)
This register controls pixel reference level by controlling bias current of pixel output sensing load
transistor. It controls pixel output level itself, compare with that revel register adjust A/D Converter
circuit to calibrate reference level for data reading. Available program range is 0 ~ 7. The larger
register value causes the higher bias current and low pixel output reference level. This register is
option for manufacturer. Users may use default setting and don’ t changed value.
(15) Low Reference Number Register(low_ref_no)
High : (Address 57h default:00h, Read Only)
Low : (Address 58h, default:00h, Read Only)
Low Reference Number Registers indicates number of pixels in frame that have a value less then 5.
A reference level values of each pixel is compare with ‘ 5’ , and accumulated to these registers
during read state. This counter value called
low_ref_no
, consist of two bytes and it is read only
registers. Real number of pixels that have value less than 5 is the twice of these register value. If
low_ref_no
is big value, you must increase data value of Reset Level Control Register. These
registers are updated after every VSYNC signal.
(16) High Reference Number Register (high_ref_no)
High : (Address 59h, default:00h, Read Only)
Low : (Address 5Ah, default:00h, Read Only)
High Reference Number Registers indicates number of pixels in a frame that have a value great then
123. Reference level values of each pixels is compared with ‘ 123’ , and accumulated to these
registers during read state. This counter value called
high_ref_no
, consist of two bytes and it is read
only registers. Real number of pixels that have value great than 123 is the twice of these register
value. If
high_ref_no
is big value, you must decrease data value of Reset Level Control Register.
These registers are also updated after every VSYNC signal.