- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384386 > HB7121 (Hynix Semiconductor Inc.) CMOS IMAGE SENSOR With 8-bit ADC PDF資料下載
參數(shù)資料
| 型號： | HB7121 |
| 廠商： | Hynix Semiconductor Inc. |
| 英文描述： | CMOS IMAGE SENSOR With 8-bit ADC |
| 中文描述： | CMOS圖像傳感器的8位ADC |
| 文件頁數(shù)： | 12/29頁 |
| 文件大?。?/td> | 391K |
| 代理商： | HB7121 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁當(dāng)前第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁
HB7121B
Semiconductor Inc.
System IC SBU
CMOS IMAGE SENSOR
With 8-bit ADC
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume
any responsibility for use of circuits described. NO patent licenses are implied.
DA21000601R_1.0 - 12 - 2001 Hnix System IC SBU
n
Mode B[2] :
scr_size
(screen size select) <
default value : 1b>
Flexible screen size is very useful for customer. If the
scr_size
is set to high, i.e. window
mode, only pixels in windowed area defined by register 10h ~ 17h can be read . But
scr_size
is set to low state, i.e. full screen mode, all pixels in the sensor are read out regardless the
values of register 10h ~ 17h. We can select window mode or full screen mode with this bit. Full
screen size is only for chip test.
- window start point :
x : row start address (register 10h, 11h)
y : column start address (register 12h, 13h)
- window end point :
x : row start address + window width address (register 14h, 15h) - 1
y : column start address + window height address (register 16h, 17h) –1
n
Mode B
[1] :
shot
(shot mode) <
default value : 0b>
User can select continuous frame mode or snapshot mode according to application.
At the continuous frame mode, pixel data output is updated every VSYNC period. In order to
set snapshot mode, it this bit to ‘ 1’ . In that case, just single frame of pixel data will be read out,
then the sensor stops operation. Snapshot mode can be used for the digital still camera
applications.
n
Mode B[0] :
int_sel
(integration time unit select) <
default value : 0b>
This bit defines integration time unit i.e. line base or pixel clock base.
Default mode is line unit integration but at the bright condition or if you need precise exposure
time control, pixel mode is recommended. This bit related to integration time register 25h, 26h,
and 27h.
<Note>
Actual integration time can be calculated using three integration time registers and main clock
period.
In pixel mode, integration time = (25h, 26h, 27h) * main clock period.
In line mode, integration time = (26h, 27h) * line period.
(cf) line period = 828 * main clock period
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HB7121BELECTRONICS | CMOS IMAGE SENSOR With 8-bit ADC |
| HB7131D | CMOS IMAGE SENSOR With 8-bit ADC |
| HB7141D | CMOS IMAGE SENSOR With 8-bit ADC |
| HBAT54X | Silicon Schottky Barrier Double Diodes |
| HBC517 | NPN EPITAXIAL PLANAR TRANSISTOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HB7121B | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HB7121BELECTRONICS | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HB7131D | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HB7141D | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HB725 | 制造商:TE Connectivity 功能描述:MOD 10BASE-T - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。