參數(shù)資料
型號(hào): HB54R1G9F2-A75B
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 1GB Registered DDR SDRAM DIMM
中文描述: 128M X 72 DDR DRAM MODULE, 0.75 ns, DMA184
封裝: DUAL LEAD OUT, SOCKET TYPE, DIMM-184
文件頁數(shù): 9/16頁
文件大?。?/td> 146K
代理商: HB54R1G9F2-A75B
HB54R1G9F2-A75B/B75B/10B
Data Sheet E0089H40 (Ver. 4.0)
9
Differential Clock Net Wiring (CK0, /CK0)
120
240
(Typically two registers per DIMM)
0ns (nominal)
240
120
120
CK0
Notes: 1. The clock delay from the input of the PLL clock to the input of any SDRAM or register willl
be set to 0 ns (nominal).
2. Input, output and feedback clock lines are terminated from line to line as shown, and not
from line to ground.
3. Only one PLL output is shown per output type. Any additional PLL outputs will be wired
in a similar manner.
4. Termination resistors for feedback path clocks are located after the pins of the PLL.
C
/CK0
SDRAM
stack
SDRAM
stack
Register1
Register2
PLL
Feedback
IN
OUT1
OUT'N'
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