參數(shù)資料
型號(hào): HB52F649E1-75B
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 512 MB Registered SDRAM DIMM 64-Mword 】 72-bit, 133 MHz Memory Bus, 1-Bank Module (18 pcs of 64 M 】 4 Components) PC133SDRAM
中文描述: 64M X 72 SYNCHRONOUS DRAM MODULE, 6.3 ns, DMA168
封裝: DIMM-168
文件頁數(shù): 10/16頁
文件大?。?/td> 143K
代理商: HB52F649E1-75B
HB52F649E1-75B
Data Sheet E0021H10
10
DC Characteristics
(Ta = 0 to 55
°
C, V
CC
= 3.3 V ± 0.3 V, V
SS
= 0 V)
HB52F649E1-75B
PC133
CE
latency = 4
PC100
CE
latnecy = 3
Parameter
Symbol Min
Max
Min
Max
Unit Test conditions
Notes
Operating current
I
CC1
2675
2675
mA
Burst length = 1
t
RC
= min
CKE = V
IL
, t
CK
= 12 ns 6
1, 2, 3
Standby current in power
down
I
CC2P
749
749
mA
Standby current in power
down
(input signal stable)
I
CC2PS
731
731
mA
CKE = V
IL
, t
CK
=
7
Standby current in non
power down
I
CC2N
1055
1055
mA
CKE,
S
= V
IH
,
t
CK
= 12 ns
CKE = V
IL
, t
CK
= 12 ns 1, 2, 6
4
Active standby current in
power down
I
CC3P
767
767
mA
Active standby current in
non power down
I
CC3N
1235
1235
mA
CKE,
S
= V
IH
,
t
CK
= 12 ns
t
CK
= min, BL = 4
t
RC
= min
V
IH
V
0.2 V
V
IL
0.2 V
0
Vin
V
CC
0
Vout
V
CC
DQ = disable
1, 2, 4
Burst operating current
I
CC4
I
CC5
I
CC6
3035
2405
mA
1, 2, 5
Refresh current
4655
4655
mA
3
Self refresh current
749
749
mA
8
Input leakage current
I
LI
I
LO
10
10
10
10
μA
Output leakage current
10
10
10
10
μA
Output high voltage
V
OH
V
OL
2.4
2.4
V
I
OH
=
4 mA
I
OL
= 4 mA
Output low voltage
Notes: 1. I
depends on output load condition when the device is selected. I
CC
(max) is specified at the
output open condition.
2. One bank operation.
3. Input signals are changed once per one clock.
4. Input signals are changed once per two clocks.
5. Input signals are changed once per four clocks.
6. After power down mode, CK operating current.
7. After power down mode, no CK operating current.
8. After self refresh mode set, self refresh current.
0.4
0.4
V
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