參數(shù)資料
型號(hào)： GS9092-CNE3
廠商： Gennum Corporation
英文描述： GS9092 GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI
中文描述： GS9092 GenLINX - R的第三270Mb / s的串行SDI和DVB - ASI在內(nèi)
文件頁數(shù)： 53/58頁
文件大?。?/td> 608K
代理商： GS9092-CNE3
GS9092 Data Sheet
28202 - 2
September 2005
53 of 58
3.14 JTAG Operation
When the JTAG/HOST pin is set HIGH by the application layer, the host interface
port (as described in
GSPI Host Interface on page 49
) will be configured for JTAG
test operation. In this mode, pins 16, 17, 19, and 20 become TMS, TCK, TDO, and
TDI respectively. In addition, the RESET pin will operate as the test reset pin, as
well as resetting the internal registers.
Boundary scan testing using the JTAG interface will be possible in this mode.
There are two methods in which JTAG can be used on the GS9092:
1. As a stand-alone JTAG interface to be used at in-circuit ATE (Automatic Test
Equipment) during PCB assembly; or
2. Under control of the host for applications such as system power self tests.
When the JTAG tests are applied by ATE, care must be taken to disable any other
devices driving the digital I/O pins. If the tests are to be applied only at ATE, this
can be accomplished with tri-state buffers used in conjunction with the
JTAG/HOST input signal. This is shown in
Figure 3-15
.
Alternatively, if the test capabilities are to be used in the system, the host may still
control the JTAG/HOST input signal, but some means for tri-stating the host must
exist in order to use the interface at ATE. This is represented in
Figure 3-16
.
Figure 3-15: In-Circuit JTAG
Application HOST
GS9092
CS_TMS
SCLK_TCK
SDIN_TDI
SDOUT_TDO
JTAG_EN
In-circuit ATE probe
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