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| 型號(hào)： | GS8161V36CGD-333I |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | DRAM |
| 英文描述： | 1M x 18 and 512K x 36 18Mb Sync Burst SRAMs |
| 中文描述： | 512K X 36 CACHE SRAM, 4.5 ns, PBGA165 |
| 封裝： | 13 X 15 MM, 1 MM PITCH, LEAD FREE, FBGA-165 |
| 文件頁數(shù)： | 13/28頁 |
| 文件大?。?/td> | 584K |
| 代理商： | GS8161V36CGD-333I |
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GS8161V18/36CD-333/300/250
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 2/2005
13/28
2004, GSI Technology
AC Test Conditions
Parameter
Conditions
V
DD
– 0.2 V
0.2 V
1 V/ns
V
DD
/2
V
DDQ
/2
Fig. 1
Input high level
Input low level
Input slew rate
Input reference level
Output reference level
Output load
Notes:
1.
2.
Include scope and jig capacitance.
Test conditions as specified with output loading as shown in
Fig. 1
unless otherwise noted.
Device is deselected as defined by the Truth Table.
3.
DC Electrical Characteristics
Parameter
Input Leakage Current
(except mode pins)
Symbol
Test Conditions
Min
Max
I
IL
V
IN
= 0 to V
DD
–
1 uA
1 uA
ZZ Input Current
I
IN1
V
DD
≥
V
IN
≥
V
IH
0 V
≤
V
IN
≤
V
IH
V
DD
≥
V
IN
≥
V
IL
0 V
≤
V
IN
≤
V
IL
Output Disable, V
OUT
= 0 to V
DD
I
OH
=
–
4 mA, V
DDQ
= 1.6 V
I
OL
= 4 mA, V
DD
= 1.6 V
–
1 uA
–
1 uA
1 uA
100 uA
FT Input Current
I
IN2
–
100 uA
–
1 uA
1 uA
1 uA
Output Leakage Current
I
OL
V
OH1
V
OL1
–
1 uA
1 uA
Output High Voltage
V
DDQ
– 0.4 V
—
Output Low Voltage
—
0.4 V
DQ
V
DDQ/2
50
30pF
*
Output Load 1
* Distributed Test Jig Capacitance
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