參數(shù)資料
型號(hào): GS8161V36CGD-333I
廠商: GSI TECHNOLOGY
元件分類: DRAM
英文描述: 1M x 18 and 512K x 36 18Mb Sync Burst SRAMs
中文描述: 512K X 36 CACHE SRAM, 4.5 ns, PBGA165
封裝: 13 X 15 MM, 1 MM PITCH, LEAD FREE, FBGA-165
文件頁數(shù): 10/28頁
文件大?。?/td> 584K
代理商: GS8161V36CGD-333I
GS8161V18/36CD-333/300/250
Preliminary
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.01 2/2005
10/28
2004, GSI Technology
Simplified State Diagram with G
First Write
First Read
Burst Write
Burst Read
Deselect
R
W
CR
CW
X
X
W
R
R
W
R
X
X
X
CR
R
CW
CR
CR
W
CW
W
CW
Notes:
1.
2.
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing
through a deselect cycle. Dummy read cycles increment the address counter just like normal read cycles.
Transitions shown in gray tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
3.
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