參數(shù)資料
型號: GS8160E32
廠商: GSI TECHNOLOGY
英文描述: 16Mb(512K x 36Bit)Sync Burst SRAM(16M位(512K x 36位)同步靜態(tài)RAM(帶2位脈沖地址計數(shù)器))
中文描述: 16Mb的(為512k × 36Bit)同步突發(fā)靜態(tài)存儲器(1,600位(為512k × 36位)同步靜態(tài)隨機(jī)存儲器(帶2位脈沖地址計數(shù)器))
文件頁數(shù): 7/26頁
文件大?。?/td> 519K
代理商: GS8160E32
Rev: 2.07 11/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
7/26
1999, Giga Semiconductor, Inc.
Preliminary
GS8160E18/32/36T-225/200/180/166/150/133
Mode Pin Functions
Note:
There is a pull-up device on the and FT pin and a pull-down device on the ZZ pin, so those input pins can be unconnected and the
chip will operate in the default states as specified in the above tables.
Burst Counter Sequences
Linear Burst Sequence
BPR 1999.05.18
Mode Name
Pin
Name
State
Function
Burst Order Control
LBO
L
H
L
Linear Burst
Interleaved Burst
Flow Through
Pipeline
Active
Standby, I
DD
= I
SB
Output Register Control
FT
H or NC
L or NC
Power Down Control
ZZ
H
Note: The burst counter wraps to initial state on the 5th clock.
I
nterleaved Burst Sequence
Note: The burst counter wraps to initial state on the 5th clock.
A[1:0] A[1:0] A[1:0] A[1:0]
1st address
00
01
10
11
2nd address
01
10
11
00
3rd address
10
11
00
01
4th address
11
00
01
10
A[1:0] A[1:0] A[1:0] A[1:0]
1st address
00
01
10
11
2nd address
01
00
11
10
3rd address
10
11
00
01
4th address
11
10
01
00
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