參數(shù)資料
型號(hào)： GS1559
廠商： Gennum Corporation
英文描述： GS1559 HD-LINX-TM II Multi-Rate Deserializer with Loop-Through Cable Driver
中文描述： GS1559的HD - LINX進(jìn)程，商標(biāo)第二多速率解串器與環(huán)通電纜驅(qū)動(dòng)器
文件頁數(shù)： 47/74頁
文件大?。?/td> 686K
代理商： GS1559
GS1559 Data Sheet
30572 - 4
July 2005
47 of 74
4.10.4 Automatic Video Standard and Data Format Detection
The GS1559 can independently detect the input video standard and data format by
using the timing parameters extracted from the received TRS ID words. This
information is presented to the host interface via the VIDEO_STANDARD register
(
Table 4-7
).
Total samples per line, active samples per line, total lines per field/frame and active
lines per field/frame are also calculated and presented to the host interface via the
RASTER_STRUCTURE registers (
Table 4-8
). These line and sample count
registers are updated once per frame at the end of line 12. This is in addition to the
information contained in the VIDEO_STANDARD register.
After device reset, the four RASTER_STRUCTURE registers default to zero.
4.10.4.1 Video Standard Indication
The video standard codes reported in the VD_STD[4:0] bits of the
VIDEO_STANDARD register represent the SMPTE standards as shown in
Table 4-9
.
In addition to the 5-bit video standard code word, the VIDEO_STANDARD register
also contains two status bits. The STD_LOCK bit will be set HIGH whenever the
flywheel has achieved full synchronization. The INT_PROG bit will be set LOW if
the detected video standard is progressive and HIGH if the detected video
standard is interlaced.
The VD_STD[4:0], STD_LOCK and INT_PROG bits of the VIDEO_STANDARD
register will default to zero after device reset. The VD_STD[4:0] and INT_PROG
bits will also default to zero if the device loses lock to the input data stream,
(LOCKED = LOW), or if the SMPTE_BYPASS pin is asserted LOW. The
STD_LOCK bit will retain its previous value if the input is removed.
Table 4-6: Host Interface Description for SMPTE 352M Payload Identifier Registers
Register Name
Bit
Name
Description
R/W
Default
VIDEO_FORMAT_OUT_B
Address: 00Dh
15-8
SMPTE352M
Byte 4
Data will be available in this register when Video
Payload Identification Packets are detected in the
data stream.
R
0
7-0
SMPTE352M
Byte 3
Data will be available in this register when Video
Payload Identification Packets are detected in the
data stream.
R
0
VIDEO_FORMAT_OUT_A
Address: 00Ch
15-8
SMPTE352M
Byte 2
Data will be available in this register when Video
Payload Identification Packets are detected in the
data stream.
R
0
7-0
SMPTE352M
Byte 1
Data will be available in this register when Video
Payload Identification Packets are detected in the
data stream.
R
0
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