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參數(shù)資料
| 型號(hào)： | GS1532-CFE3 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS1532 HD-LINX-TM II Multi-Rate Serializer |
| 中文描述： | GS1532的HD - LINX進(jìn)程，商標(biāo)第二多速率串行器 |
| 文件頁數(shù)： | 9/52頁 |
| 文件大小： | 512K |
| 代理商： | GS1532-CFE3 |
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GS1532 Data Sheet
21498 - 6
June 2005
9 of 52
29
SDIN_TDI
Synchronous
with
SCLK_TCK
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Serial Data In / Test Data Input
Host Mode (JTAG/HOST = LOW)
SDIN_TDI operates as the host interface serial input, SDIN, used to write
address and configuration information to the internal registers of the
device.
JTAG Test Mode (JTAG/HOST = HIGH)
SDIN_TDI operates as the JTAG test data input, TDI.
NOTE: If the host interface is not being used, tie this pin HIGH.
30
SCLK_TCK
Non
Synchronous
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Serial Data Clock / Test Clock.
Host Mode (JTAG/HOST = LOW)
SCLK_TCK operates as the host interface burst clock, SCLK. Command
and data read/write words are clocked into the device synchronously with
this clock.
JTAG Test Mode (JTAG/HOST = HIGH)
SCLK_TCK operates as the JTAG test clock, TCK.
NOTE: If the host interface is not being used, tie this pin HIGH.
32
BLANK
Synchronous
with PCLK
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to enable or disable input data blanking.
When set LOW, the luma and chroma input data is set to the appropriate
blanking levels. Horizontal and vertical ancillary spaces will also be set to
blanking levels.
When set HIGH, the luma and chroma input data pass through the device
unaltered.
33, 68
CORE_GND
–
Power
Ground connection for the digital core logic. Connect to digital GND.
34
F
Synchronous
with PCLK
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to indicate the ODD / EVEN field of the video signal when
DETECT_TRS is set LOW. The device will set the F bit in all outgoing TRS
signals for the entire period that the F input signal is HIGH
(IOPROC_EN/DIS must also be HIGH).
The F signal should be set HIGH for the entire period of field 2 and should
be set LOW for all lines in field 1 and for all lines in progressive scan
systems.
The F signal is ignored when DETECT_TRS = HIGH.
Table 1-1: Pin Descriptions (Continued)
Pin
Number
Name
Timing
Type
Description
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| GS1535-CFU | GS1535 HD-LINX II-TM Multi-Rate SDI Automatic Reclocker |
| GS1535-CFUE3 | GS1535 HD-LINX II-TM Multi-Rate SDI Automatic Reclocker |
| GS1535A | GS1535A / GS9065A HD-LINX-R II Multi-Rate SDI Automatic Reclocker |
| GS1535ACFUE3 | GS1535A / GS9065A HD-LINX-R II Multi-Rate SDI Automatic Reclocker |
| GS9065A | GS1535A / GS9065A HD-LINX-R II Multi-Rate SDI Automatic Reclocker |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS1535 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GS1535 HD-LINX II-TM Multi-Rate SDI Automatic Reclocker |
| GS1535A | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate SDI Automatic Reclocker |
| GS1535A_06 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate SDI Automatic Reclocker |
| GS1535ACFUE3 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate SDI Automatic Reclocker |
| GS1535BCFUE3 | 制造商:Gennum Corporation 功能描述:IC RELOCKER HD/SD/ASI 64LQFP 制造商:Gennum Corporation 功能描述:IC, RELOCKER, HD/SD/ASI, 64LQFP 制造商:Gennum Corporation 功能描述:IC, RELOCKER, HD/SD/ASI, 64LQFP; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Digital IC Case Style:LQFP; No. of Pins:64; Operating Temperature Min:0C; Operating Temperature Max:70C; MSL:MSL 3 - 168 hours; SVHC:No SVHC |
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