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參數(shù)資料
| 型號： | GS1532-CFE3 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS1532 HD-LINX-TM II Multi-Rate Serializer |
| 中文描述： | GS1532的HD - LINX進程，商標(biāo)第二多速率串行器 |
| 文件頁數(shù)： | 40/52頁 |
| 文件大?。?/td> | 512K |
| 代理商： | GS1532-CFE3 |
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GS1532 Data Sheet
21498 - 6
June 2005
40 of 52
3.8 Serial Digital Data PLL
To obtain a clean clock signal for serialization and transmission, the input PCLK is
locked to an external reference signal via the GS1532's integrated phase-locked
loop. This PLL is also responsible for generating all internal clock signals required
by the device.
Internal division ratios for the locked PCLK are determined by the setting of the
SD/HD and 20bit/10bit pins as shown in
Table 3-10
.
3.8.1 External VCO
The GS1532 requires the GO1525 external voltage controlled oscillator as part of
its internal PLL.
Power for the external VCO is generated entirely by the GS1532 from an integrated
voltage regulator. The internal regulator uses +3.3V supplied on the CP_VDD /
CP_GND pins to provide +2.5V on the VCO_VCC / VCO_GND pins.
The external VCO produces a 1.485GHz reference signal for the PLL, input on the
VCO pin of the device. Both reference and control signals should be referenced to
the supplied VCO_GND as shown in the recommended application circuit of
Typical Application Circuit on page 47
.
3.8.2 Lock Detect Output
The lock detect block controls the serial digital output signal and indicates to the
application layer the lock status of the device via the LOCKED output pin.
LOCKED will be asserted HIGH if and only if the internal data PLL has locked the
PCLK signal to the external VCO reference signal and one of the following is true:
1. The device is set to operate in SMPTE mode and has detected SMPTE TRS
words in the serial stream; or
2. The device is set to operate in DVB-ASI mode and has detected K28.5 sync
characters in the serial stream; or
3. The device is set to operate in Data-Through mode.
Table 3-10: Serial Digital Output Rates
Supplied PCLK Rate
Serial Digital
Output Rate
Pin Settings
SD/HD
20bit/10bit
74.25 or
74.25/1.001 MHz
1.485 or
1.485/1.001Gb/s
LOW
HIGH
148.5 or
148.5/1.001MHz
1.485 or
1.485/1.001Gb/s
LOW
LOW
13.5MHz
270Mb/s
HIGH
HIGH
27MHz
270Mb/s
HIGH
LOW
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS1535 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GS1535 HD-LINX II-TM Multi-Rate SDI Automatic Reclocker |
| GS1535A | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate SDI Automatic Reclocker |
| GS1535A_06 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate SDI Automatic Reclocker |
| GS1535ACFUE3 | 制造商:GENNUM 制造商全稱:GENNUM 功能描述:Multi-Rate SDI Automatic Reclocker |
| GS1535BCFUE3 | 制造商:Gennum Corporation 功能描述:IC RELOCKER HD/SD/ASI 64LQFP 制造商:Gennum Corporation 功能描述:IC, RELOCKER, HD/SD/ASI, 64LQFP 制造商:Gennum Corporation 功能描述:IC, RELOCKER, HD/SD/ASI, 64LQFP; Supply Voltage Min:3.135V; Supply Voltage Max:3.465V; Digital IC Case Style:LQFP; No. of Pins:64; Operating Temperature Min:0C; Operating Temperature Max:70C; MSL:MSL 3 - 168 hours; SVHC:No SVHC |
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