參數(shù)資料
型號: GL811S
廠商: Genesys Logic, Inc.
英文描述: USB 2.0 to ATA/ATAPI Bridge Controller
中文描述: USB 2.0至的ATA / ATAPI控制器橋
文件頁數(shù): 25/37頁
文件大?。?/td> 958K
代理商: GL811S
GL811S USB2.0 to ATA/ATAPI Bridge Controller
2007 Genesys Logic Inc. - All rights reserved.
Page 25
Figure 6.2 - Sustaining a Multiword DMA Data Burst
Note:
To terminate the data burst, the Device shall negate DMARQ within the t
L
of the assertion of the current
DIOR_ or DIOW_ pulse. The last data word for the burst shall then be transferred by the negation of the
current DIOR_ or DIOW_ pulse. If all data for the command has not been transferred, the device shall reassert
DMARQ again at any later time to resume the DMA operation.
Figure 6.3 - Device Terminating a Multiword DMA Data Burst
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