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參數(shù)資料
| 型號(hào)： | GL310MC4D |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | GL310MC PS/2 4D Mouse Controller |
| 中文描述： | GL310MC的PS / 2 4D滑鼠控制器 |
| 文件頁數(shù)： | 8/18頁 |
| 文件大?。?/td> | 232K |
| 代理商： | GL310MC4D |
Revision 1.0 July/16/1998
7
GL310MC PS/2 4D Mouse Controller
In Figure 4-3, the CLK signal is low for 30-50
μ
s (t6) and high for 30-50
μ
s (t7) in each bit cell.
DATA is sampled when CLK is high, and must be valid no later than 1
μ
s after the rising edge of
the clock (t8>-1
μ
s. t9>= 0
μ
s). In the line control bit, DATA goes low at least 5
μ
s before the
falling edge (t10) and stays low at least 5
μ
s after the rising edge (t11) of the clock.
For each command or argument byte that requires a response, the host waits for the response
before sending another byte. The device responds within 20ms, unless inhibited by the host.
If the device receives an invalid byte, a byte with incorrect parity, or a framing error, it sends a
Resend ($FE) response to the host. If the next input from the host is also invalid, the device sends
an Error ($FC) response.
4.4 Power-on reset
At power-up, the mouse performs a self-test and calibration, then transmits the completion code $AA
and ID code $00. If the device fails its self-test, it transmits error code $FC and ID code $00.This
processing also occurs when a software Reset ($FF) command is received. The host should not
attempt to send commands to the device until the calibration/self-test is complete.
Power-on self-test and calibration takes 300-1000ms. Self-test and calibration following a software
Reset command takes 300-500ms.
If the host wishes to use the mouse as soon as possible after power-up and is not interested in the
$AA, $00 announcement, it can simply put the bus into the "request-to -send" state immediately on
power-up. The mouse will respond by clocking in the host's first initialization command as soon as it
is ready; this command will override the $AA, $00 announcement. If the host sends a Reset ($FF)
before the initial $AA, $00 announcement, then the $AA, $00 response to the Reset command may
be delayed by the full 300-1000ms required for power-on calibration.
CLK1
CLK2
CLK10
CLK11
CLK9
Request-to-send
Bit0
Bit1
Bit7
Parity bit
Stop bit
Line control
t5
t6
t7
t8
t9
t10
t11 t12
Figure 4-3. PS/2 output waveforms
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