參數(shù)資料
型號: GCIXP1250-166
英文描述: Microprocessor
中文描述: 微處理器
文件頁數(shù): 55/148頁
文件大?。?/td> 1601K
代理商: GCIXP1250-166
Intel
IXP1250 Network Processor
Datasheet
55
Table 25. 64-Bit Bidirectional IX Bus, 1-2 MAC Mode
Signal
Description
GPIO[3:1]
Active High, input/output assigned to StrongARM* core not used for MAC interface.
GPIO[0]
Active Low, output flow-control enable for MAC 0.
RDYCTL_L[3:0]
Active Low, output, enables for Transmit or Receive Ready flags.
RDYCTL_L[4]
Active Low, output, flow-control enable for MAC 1.
RDYBUS[7:0]
Active High, input/output, Transmit or Receive Ready flags, and flow control mask
data.
PORTCTL_L[3:0]
Active Low, output, transmit and receive device selects.
FPS[2:0]
Active High, output, port select.
SOP
Active High, input/output, Start of Packet indication. SOP is an output during
transmit according to values programmed in the TFIFO control field. Is an input
during receives indicating Receive Start of Packet from MAC.
EOP
Active High, input/output, End of Packet indication. EOP is an output during
transmit according to values programmed in the TFIFO control field. Is an input
during receives indicating Receive End of Packet from MAC.
TK_IN
Input, not used, must be pulled High in this mode.
TK_OUT
Output, not used, no connect.
RXFAIL
Active High, input/output.
Input - Receive Error input.
Output - driven low during transmit and when bus maintains a No-Select state.
TXASIS
Active High, output. TXAXIS states are output according to values programmed in
the TFIFO Control field. TXASIS state is output coincident with SOP signal, TXERR
state is output coincident with EOP signal.
FBE_L[7:0]
Active Low, byte enables for FDAT [64:0].
FDAT[63:0]
Active High, read and write data.
FAST_RX1
Active High ready input from FastPort 0, pulldown 10 KOhms to GND if not used.
FAST_RX2
Active High ready input from FastPort 1, pulldown 10 KOhms to GND if not used.
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