參數(shù)資料
型號: GCIXF1002ED
英文描述: Controller Miscellaneous - Datasheet Reference
中文描述: 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù): 86/128頁
文件大?。?/td> 1262K
代理商: GCIXF1002ED
Intel
IXF1002 Dual Port Gigabit Ethernet Controller
86
Datasheet
6.7.1
Synchronization
The IXF1002 implements the synchronization process as defined in IEEE 802.3z. The
synchronization process is responsible for determining whether the underlying receive channel is
ready for operation.
Every set of ten bits transferred onto the line are called a Code-group. Ordered set consist of either
one, two, or four code-groups where the first code-group is a special code-group. The seven bit
comma string is defined as either b
xxx0011111
(comma+) or b
xxx1100000
(comma-).
Code-group synchronization is acquired by the detection of three ordered sets, containing comma
strings in their first code group without receiving invalid code-group errors in between these three
ordered sets.
6.7.1.1
Comma detect
When the Physical Medium Attachment (PMA) sublayer, which is a part of the PHY, detects a
comma within the incoming rx_bit stream, it may realign its current code-group boundary to that of
the received comma. During reception of a comma, the comdet_{i} signal is asserted by the PHY.
Detection of a comma is done by the PHY only when the encdet_{i} signal is asserted. Assertion of
PORT_MODE<FXECD> bit, will cause the encdet_{i} signal to be continuously asserted.
Deassertion of this bit will cause assertion of the encdet_{i} signal only during
loss-of-synchronization mode.
6.7.2
Auto-Negotiation
The IXF1002 implements the Auto-Negotiation process as defined in IEEE 802.3z, including full
support of next page exchange.
The Auto-Negotiation process provides the means to exchange configuration information between
the local device and the link partner device, and to automatically configure both devices to
maximum advantage of their abilities. The receive and transmit flow-control working mode, which
is resolved by the priority resolution function of the Auto-Negotiation, will be reflected in the
GPCS_STT register. (see
Section 3.2.5.9
).
The Auto-Negotiation process starts with no need of management interference. For restarting
Auto-Negotiation with ability advertised values other than the default, updating should be done in
AN_ADV register and then the MII_CTL<RESAN> bit, should be asserted. Disable
Auto-Negotiation by deasserting MII_CTL<ANENBL> bit. This will immediately start data
transmission and reception in the default mode.
相關(guān)PDF資料
PDF描述
GCIXF1002EDT Controller Miscellaneous - Datasheet Reference
GCIXF440AC Controller Miscellaneous - Datasheet Reference
GCIXF440ACT Controller Miscellaneous - Datasheet Reference
GCIXP1250-166 Microprocessor
GCIXP1250-200 Microprocessor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GCIXF1002EDT 制造商:Intel 功能描述:Ethernet CTLR Single Chip 1000Mbps 3.3V 304-Pin ESBGA
GCIXF1012EC.A3-884560 功能描述:IC ETHERNET MAC 12PORT 672-BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:2,450 系列:- 控制器類型:SPI 總線至 I²C 總線橋接 接口:I²C,串行,SPI 電源電壓:2.4 V ~ 3.6 V 電流 - 電源:11mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-HVQFN(4x4) 包裝:托盤 配用:568-3511-ND - DEMO BOARD SPI TO I2C 其它名稱:935286452157SC18IS600IBSSC18IS600IBS-ND
GCIXF1012ECA3 制造商:Cortina Systems Inc 功能描述: 制造商:Intel 功能描述:
GCIXF1024EC.A3-884561 功能描述:IC ETHERNET MAC 24PORT 672-BGA RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN(6x6) 包裝:* 其它名稱:Q6396337A
GCIXF18104EE-B0 制造商:Cortina Systems Inc 功能描述: