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參數(shù)資料
| 型號： | G12290EJ2V0AN00 |
| 英文描述： | uPC1663 DC to VHF Wideband Differential Input and Output Amplifier IC |
| 中文描述： | uPC1663直流高頻寬帶差分輸入和輸出功放IC |
| 文件頁數(shù)： | 12/23頁 |
| 文件大?。?/td> | 165K |
| 代理商： | G12290EJ2V0AN00 |
12
3.7 Input Bias Current (I
B
)
This indicates the base current at input transistors Q
1
and Q
2
.
3.8 Input Noise Voltage (V
n
)
In Figure 6, the value measured by an RF AC voltmeter is divided by the single-end gain value.
Figure 6. Input Noise Voltage Measurement Circuit
50
50
6
5
3
1
8
4
1 k
1 k
RF AC voltmeter
10 kHz to 10 MHz
(passive filter)
V
CC–
V
CC+
3.9 Input Voltage Range (V
I
)
This indicates the input voltage range for normal operation, during which input signals must be within this range.
With the intermediate potential between V
CC
V (when V
CC
+
and V
CC
e
as the center, the input voltage range is guaranteed within
r
1
+
e
V
CC
e
= 12 V).
3.10 Common Mode Rejection Ratio (CMR)
Figure 7. Common Mode Rejection Ratio Measurement Circuit
50
V
CC+
V
CC–
V
IN
V
O
= OUT
1
+ OUT
2
Differential probe
6
5
3
1
8
4
This indicates the rate of variation in the input conversion offset relative to the common mode input signal. This
can be expressed as follows, based on the circuit shown in Figure 7.
CMR = 20 log
x
A
VD
'
V
IN
'
V
O
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