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參數(shù)資料
| 型號： | G12290EJ2V0AN00 |
| 英文描述： | uPC1663 DC to VHF Wideband Differential Input and Output Amplifier IC |
| 中文描述： | uPC1663直流高頻寬帶差分輸入和輸出功放IC |
| 文件頁數(shù)： | 11/23頁 |
| 文件大小： | 165K |
| 代理商： | G12290EJ2V0AN00 |
11
The electrical characteristics are defined as follows.
3.1 Differential Voltage Gain (A
VD
)
As was described in section 2.2, this indicates the ratio between the differential input and differential output
voltage.
|
'
OUT
1
| + |
'
OUT
2
|
'
|OUT
1
e
'
OUT
2
|
A
VD
=
or
|
'
V
DIF
|
|
'
V
DIF
|
The single-end gain (A
VS
) for single-side output is expressed as one half of A
VD
shown below.
|
'
OUT
1
|
|
'
OUT
2
|
A
VS
=
or
|
'
V
DIF
|
|
'
V
DIF
|
3.2 Bandwidth (BW)
This is defined as the bandwidth when there is a 3-dB down gain (1 /
—
2) in relation to the DC gain.
3.3 Rise Time (t
r
) and Propagation Delay Time (t
pd
)
These are defined as shown below for this IC.
Figure 5. Measurement Conditions for t
pd
and t
r
50 %
50 %
90 %
10 %
t
pd
t
r
3.4 Input Resistance (R
in
)
This indicates the ratio of the change in the input bias voltage (
'
I
B
) to the change in the input voltage (
'
V
IN
).
R
IN
=
'
V
IN
/
'
I
B
The input resistance is defined as the product of the input transistor's current gain
E
and the emitter resistance.
Therefore, this value is reduced in relation to higher gain values.
3.5 Input Capacitance (C
in
)
This indicates the capacitance between the input and the GND.
3.6 Input Offset Current (I
IO
)
This is the offset current of the dual input bias current.
I
IO
= |IB
1
e
IB
2
|
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