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參數(shù)資料
| 型號(hào)： | FXLA0104QFX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | TRANSLATOR 4BIT DUAL 12-UMLP |
| 標(biāo)準(zhǔn)包裝： | 5,000 |
| 邏輯功能： | 變換器，雙向，3 態(tài) |
| 位數(shù)： | 4 |
| 輸入類型： | 電壓 |
| 輸出類型： | 電壓 |
| 數(shù)據(jù)速率： | 140Mbps |
| 通道數(shù)： | 1 |
| 輸出/通道數(shù)目： | 4 |
| 差分 - 輸入:輸出： | 無/無 |
| 傳輸延遲（最大）： | 4ns |
| 電源電壓： | 1.1 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | * |
| 供應(yīng)商設(shè)備封裝： | * |
| 包裝： | * |
2011 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXLA0104
Rev. 1.0.1
16
FXLA0
1
0
4
—
Low
-V
o
ltage
Dua
l-
S
upply
4
-Bit
Vol
tage
Tra
n
s
la
to
r
Physical Dimensions
Figure 11. 12-Lead, Ultrathin Molded Leadless Package (UMLP)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision.
Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
BOTTOM VIEW
TOP VIEW
SIDE VIEW
NOTES:
A. PACKAGE DOES NOT FULLY CONFORM TO
JEDEC MO-220 REGISTRATION
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 1994.
D. LAND PATTERN RECOMMENDATION IS
BASED ON FSC DESIGN ONLY.
E. DRAWING FILENAME: MKT-UMLP12Crev2.
A
B
C
RECOMMENDED LAND PATTERN
0.10 C
0.08 C
2.00
1.70
0.10 C
2X
0.10 C
1
0.10
C A B
0.05
C
0.20±0.05 12X
0.50±0.05
PIN1
IDENT
PIN1
IDENT
5
6
SEATING
12
11
7
0.15±0.05
PLANE
1.90
0.40
0.20(12X)
0.65(12X)
(0.20)
2.00±0.10
0.40
0.50±0.05 12X
1.70±0.10
1.80
2.20
0.25
0.13
0.50
0.20
(SEE DETAIL A)
DETAIL A
0.025±0.025
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