參數(shù)資料
型號(hào)： FXLA0104QFX
廠商： Fairchild Semiconductor
文件頁(yè)數(shù)： 13/17頁(yè)
文件大小： 0K
描述： TRANSLATOR 4BIT DUAL 12-UMLP
標(biāo)準(zhǔn)包裝： 5,000
邏輯功能： 變換器，雙向，3 態(tài)
位數(shù)： 4
輸入類型： 電壓
輸出類型： 電壓
數(shù)據(jù)速率： 140Mbps
通道數(shù)： 1
輸出/通道數(shù)目： 4
差分 - 輸入:輸出： 無(wú)/無(wú)
傳輸延遲（最大）： 4ns
電源電壓： 1.1 V ~ 3.6 V
工作溫度： -40°C ~ 85°C
封裝/外殼： *
供應(yīng)商設(shè)備封裝： *
包裝： *
2011 Fairchild Semiconductor Corporation
www.fairchildsemi.com
FXLA0104
Rev. 1.0.1
5
FXLA0
1
0
4
—
Low
-V
o
ltage
Dua
l-
S
upply
4
-Bit
Vol
tage
Tra
n
s
la
to
r
Power-Up/Power-Down Sequence
FXL translators offer an advantage in that either VCC
may be powered up first. This benefit derives from the
chip design. When either VCC is at 0V, outputs are in a
high-impedance
state.
The
control
input
(OE)
is
designed to track the VCCA supply.
The recommended power-up sequence is:
1.
Apply power to the first VCC.
2.
Apply power to the second VCC.
3.
Drive the OE input HIGH to enable the device.
The recommended power-down sequence is:
1.
Drive OE input LOW to disable the device.
2.
Remove power from either VCC.
3.
Remove power from other VCC.
Pull-Up/Pull-Down Resistors
Do not use pull-up or pull-down resistors. This device
has bus-hold circuits: pull-up or pull-down resistors are
not recommended because they interfere with the
output state. The current through these resistors may
exceed the hold drive, II(HOLD) and/or II(OD) bus-hold
currents, resulting in data transition and/or auto-
direction
sensing
failures.
The
bus-hold
feature
eliminates the need for extra resistors.
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