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參數(shù)資料
| 型號： | FXA1012WC |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 圖像傳感器 |
| 英文描述： | Frame Transfer CCD Image Sensor |
| 中文描述： | IMAGE SENSOR-CCD, SQUARE |
| 封裝： | LCC-24 |
| 文件頁數(shù)： | 5/17頁 |
| 文件大小： | 476K |
| 代理商： | FXA1012WC |
2000 January
5
Philips Semiconductors
Objective specification
Frame Transfer CCD Image Sensor
FXA 1012
Specifications
1
To set the VNS voltage for optimal Anti-Blooming (vertical overflow drain), it should be adjustable between minimum and maximum values.
2
Currents INS and IPS are specified at overexposure of 100 x Qmax.
3
Measured with Rload = 3.3 kOhms.
Absolute Maximum Ratings
Min.
Max.
Unit
GENERAL:
storage temperature
ambient temperature during operation
voltage between any two gates
DC current through any clock phase (absolute value)
OUT current (no short circuit protections)
-40
-20
-20
-0.2
0
+80
+60
+20
+2.0
4
°C
°C
V
μA
mA
VOLTAGES IN RELATION TO VPS:
VNS, RD
all other pins
-0.5
-10
+30
+25
V
V
VOLTAGES IN RELATION TO VNS:
RD
VPS
all other pins
-10
-30
-30
+0.5
+0.5
+0.5
V
V
V
DC Conditions
Min. [V]
Typical [V]
Max. [V]
Max. current
[mA]
2
2
5.5
1
-
-
VNS
VPS
SFD
SFS
OG
RD
1
N substrate
P substrate
Source Follower Drain
Source Follower Source
Output Gate
Reset Drain
20
6
19
0
3.5
19
24
7
20
0
4
20
28
9
21
0
4.5
21
2
3
Min.
Typical
Max.
Pin
Number of adjustments
0
0
1
VNS
AC Clock Level Conditions
Min.
Typical
Max.
Unit
IMAGE CLOCKS:
A-clock amplitude
A-clock low level
11
12
0
13
V
V
STORAGE CLOCKS:
B-clock amplitude
B-clock low level
11
12
0
13
V
V
HORIZONTAL AND RESET CLOCKS:
C-clock amplitude
C-clock low level C1, C3
C-clock low level C2, C4
Reset Gate (RG) amplitude
Reset Gate (RG) high level
4.5
2.5
4.5
21
5
0
3
5
22
5.5
3.5
5.25
23
V
V
V
V
V
VNS PULSE:
Charge Reset (CR) pulse on VNS
4.5
5
5.5
V
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