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參數(shù)資料
型號(hào): FT232BL-REEL
廠商: FTDI, Future Technology Devices International Ltd
文件頁(yè)數(shù): 3/34頁(yè)
文件大?。?/td> 0K
描述: IC USB FS SERIAL UART 32-LQFP
產(chǎn)品培訓(xùn)模塊: USB Introduction
標(biāo)準(zhǔn)包裝: 1
系列: USBmadeEZ-UART
通道數(shù): 1,UART
FIFO's: 256 字節(jié)
規(guī)程: RS232,RS422,RS485
電源電壓: 4.35V ~ 5.25V
帶自動(dòng)流量控制功能:
帶調(diào)制解調(diào)器控制功能:
帶CMOS:
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-LQFP
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面: 634 (CN2011-ZH PDF)
其它名稱: 768-1009-6
Copyright 2011 Future Technology Devices International Limited
11
Document No.: FT_000329
FT232BL
/BQ USB UART IC Datasheet Version 2.2
Clearance No.: FTDI#
171
possibilities exist. For instance, it may be possible to connect the device to an SRAM configurable FPGA as
supplied by vendors such as Altera and Xilinx. The FPGA device would normally be un-configured (i.e.
have no defined function) at power-up. Application software on the PC could use Bit Bang Mode to
download configuration data to the FPGA which would define its hardware function, then after the FPGA
device is configured the FT232B can switch back into UART interface mode to allow the programmed
FPGA device to communicate with the PC over USB. This approach allows a customer to create a
“generic” USB peripheral whose hardware function can be defined under control of the application
software. The FPGA based hardware can be easily upgraded or totally changed simply by changing the
FPGA configuration data file. Application notes, software and development modules for this application
area will be available from FTDI and other 3rd parties.
PreScaler Divide By 1 Fix. The previous device had a problem when the integer part of the divisor was
set to 1. In the 2nd generation device setting the prescaler value to 1 gives a baud rate of 2 million baud
and setting it to zero gives a baud rate of 3 million baud. Non-integer division is not supported with
divisor values of 0 and 1.
Less External Support Components. As well as eliminating the RCCLK RC network, and for most
applications the need for an external reset circuit, we have also eliminated the requirement for a 100K
pull-up on EECS to select 6MHz operation. When the FT232B is being used without the configuration
EEPROM, EECS, EESK and EEDATA can now be left n/c. For circuits requiring a long reset time (where the
device is reset externally using a reset generator I.C., or reset is controlled by the IO port of a MCU,
FPGA or ASIC device) an external transistor circuit is no longer required as the 1.5k pull-up resistor on
USBDP can be wired to the RSTOUT# pin instead of to 3.3V. Note : RSTOUT# drives out at 3.3V level,
not at 5V VCC level. This is the preferred configuration for new designs.
Extended EEPROM Support. The previous generation of devices only supported EEPROM of type 93C46
(64 x 16 bit). The new devices will also work with EEPROM type 93C56 (128 x 16 bit) and 93C66 (256 x
16 bit). The extra space is not used by the device, however it is available for use by other external MCU /
logic whilst the FT232B is being held in reset.
USB 2.0 (full speed option). A new EEPROM based option allows the FT232B to return a USB 2.0
device descriptor as opposed to USB 1.1. Note : The device would be a USB 2.0 Full Speed device
(12Mb/s) as opposed to a USB 2.0 High Speed device (480Mb/s).
Multiple Device Support without EEPROM. When no EEPROM (or a blank or invalid EEPROM) is
attached to the device, the FT232B no longer gives a serial number as part of its USB descriptor. This
allows multiple devices to be simultaneously connected to the same PC. However, we still highly
recommend that EEPROM is used, as without serial numbers a device can only be identified by which hub
port in the USB tree it is connected to which can change if the end user re-plugs the device into a
different port
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