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| 型號： | FT2232HQ-TRAY |
| 廠商： | Future Technology Devices International Ltd |
| 元件分類： | 總線控制器 |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQCC64 |
| 封裝： | LEAD FREE, QFN-64 |
| 文件頁數(shù)： | 22/63頁 |
| 文件大?。?/td> | 1598K |
| 代理商： | FT2232HQ-TRAY |
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Copyright 2010 Future Technology Devices International Limited
29
Document No.: FT_000061
FT2232H DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 2.10
Clearance No.: FTDI#77
4.6 MPSSE Interface Mode Description.
MPSSE Mode is designed to allow the FT2232H to interface efficiently with synchronous serial protocols
such as JTAG, I2C and SPI Bus. It can also be used to program SRAM based FPGAs over USB. The
MPSSE interface is designed to be flexible so that it can be configured to allow any synchronous serial
protocol (industry standard or proprietary) to be implemented using the FT2232H. MPSSE is available on
channel A and channel B.
MPSSE is fully configurable, and is programmed by sending commands down the data stream. These can
be sent individually or more efficiently in packets. MPSSE is capable of a maximum sustained data rate of
30 Mbits/s.
When a channel is configured in MPSSE mode, the IO timing and signals used are shown in Figure 4.7
and Table 4.3 These show timings for CLKOUT=30MHz. CLKOUT can be divided internally to be provide a
slower clock.
Figure 4.7 MPSSE Signal Waveforms
Name
Minimum
Typical
Maximum
Units
Description
t1
33.33
ns
CLKOUT period
t2
15
16.67
ns
CLKOUT high period
t3
15
16.67
ns
CLKOUT low period
t4
1
7.15
ns
CLKOUT to TDI/DO delay
t5
0
ns
TDO/DI hold time
t6
11
TDO/DI setup time
Table 4.3 MPSSE Signal Timings
MPSSE mode is enabled using Set Bit Bang Mode driver command. A hex value of 2 will enable it, and a
hex value of 0 will reset the device. See application note AN2232L-02, “Bit Mode Functions for the
FT2232D” for more details and examples.
The MPSSE command set is fully described in application note AN_108 – “Command Processor For
MPSSE and MCU Host Bus Emulation Modes”.
The following additional application notes are available for configuring the MPSSE :
AN_109 – “Programming Guide for High Speed FTCI2C DLL”
AN_110 – “Programming Guide for High Speed FTCJTAG DLL”
AN_111 – “Programming Guide for High Speed FTCSPI DLL”
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