參數(shù)資料
型號： FPD85310
廠商： National Semiconductor Corporation
英文描述： Panel Timing Controller
中文描述： 小組定時控制器
文件頁數(shù)： 10/29頁
文件大?。?/td> 440K
代理商： FPD85310
Functional Description
(Continued)
PROGRAMMABLE REGISTERS
At power-up, data is read from an external EEPROM. If any-
thing other than 00H is read back on the first EEPROM ac-
cess (indicating EEPROM not present), the internal default
values are used. The following parameters are initialized at
power up. Pullups must be used on EE_SD and EE_SC
pins.
TABLE 2. FPD85310 Programmable Register Definition
Control
Registers
Output Format
Control
EEPROM
Address
D2
The control registers provide mode setting information to the input and output interfaces.
[1:0]
“00” = Dual Bus, Single port CD interface
“01” = Dual Bus, Dual port CD interface
“10” = Single Bus, Single port CD interface
“11” = Not implemented (defaults to “10”)
“0” = Non-Skewed outputs
“1” = Skewed outputs
“0” = Data inversion is disabled
“1” = Data inversion is enabled
“0” = Data inversion when GPO[0] is “0”
“1” = Data inversion when GPO[0] is “1”
“0” = Even and Odd data inversion when data inversion is enabled
“1” = Odd data inversion determined by bit[4], Even data opposite of Odd data
“0” = Polarity Function disabled
“1” = Polarity Function enabled
“0” = OPOL/EPOL = 0 when data is inverted
“1” = OPOL/EPOL = 1 when data is inverted
Odd Start Pulse Offset
“00” = Start pulse 0 clocks before data
“01” = Start pulse 1 clock before data
“10” = Start pulse 2 clocks before data
“11” = Start pulse 3 clocks before data
Even Start Pulse Offset
“00” = Start pulse 0 clocks before data
“01” = Start pulse 1 clock before data
“10” = Start pulse 2 clocks before data
“11” = Start pulse 3 clocks before data
Unused Pixels
“0000” = no unconnected pixels at beginning of first CD
“0001” = 1 unconnected pixel at beginning of first CD
“0010” = 2 unconnected pixels at beginning of first CD
...
...
“1111” = 15 unconnected pixels at beginning of first CD
[2]
[3]
[4]
[5]
[6]
[7]
D3
[1:0]
[3:2]
[7:4]
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