參數(shù)資料
型號(hào): FM8P51P
廠商: Electronic Theatre Controls, Inc.
英文描述: EPROM/ROM-Based 8-Bit Microcontroller
中文描述: 存儲(chǔ)器/基于ROM的8位微控制器
文件頁(yè)數(shù): 53/60頁(yè)
文件大?。?/td> 369K
代理商: FM8P51P
FM8P51
Rev1.2 Mar 15, 2005
P.53/FM8P51
FEELING
TECHNOLOGY
RLR
Syntax:
Operands:
Rotate Left f through Carry
RLR R, d
0
R
63
d
[0,1]
R<7>
C;
R<6:0>
dest<7:1>;
C
dest<0>
C
The contents of register ‘R’ are rotated one bit to the left through the Carry Flag. If ‘d’ is 0 the
result is placed in the ACC register. If ‘d’ is 1 the result is stored back in register ‘R’.
1
Operation:
Status Affected:
Description:
Cycles:
RRR
Syntax:
Operands:
Rotate Right f through Carry
RRR R, d
0
R
63
d
[0,1]
C
dest<7>;
R<7:1>
dest<6:0>;
R<0>
C
C
The contents of register ‘R’ are rotated one bit to the right through the Carry Flag. If ‘d’ is 0 the
result is placed in the ACC register. If ‘d’ is 1 the result is placed back in register ‘R’.
1
Operation:
Status Affected:
Description:
Cycles:
SLEEP
Syntax:
Operands:
Operation:
Enter SLEEP Mode
SLEEP
None
00h
WDT;
00h
WDT prescaler;
1
TO;
0
PD
TO,
PD
Time-out status bit (TO) is set. The power-down status bit (
PD
) is cleared. The WDT and its
prescaler are cleared.
The processor is put into SLEEP mode.
1
Status Affected:
Description:
Cycles:
SBCAR
Syntax:
Operands:
Subtract ACC from R with Carry
SBCAR R, d
0
R
63
d
[0,1]
R + ACC + C
dest
C, DC, Z
Add the 2’s complement method of the ACC register from register ‘R’ with Carry. If ‘d’ is 0 the
result is stored in the ACC register. If ‘d’ is 1 the result is stored back in register ‘R’.
1
Operation:
Status Affected:
Description:
Cycles:
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