FEDL7204-001DIGEST-01
OKI Semiconductor
ML7204-001
6/42
PIN DESCRIPTIONS
Pin
TQFP100 QFP64
Symbol
I/O
When
PDNB
= “0”
“L”
“0”
“0”
I
I
“Hi-z”
I
Description
1
2
3
4
5
6
7
—
1
2
—
—
3
4
CLKOUT
TST1
TST0
GPIOC[0]
GPIOC[1]
PCMO
PCMI
O
I
I
I/O
I/O
O
I
12.288 MHz clock output
Test control input 1: Normally, input “0”.
Test control input 0: Normally, input “0”.
General-purpose I/O port C [0]
General-purpose I/O port C [1]
PCM data output [Open drain output pin]
PCM data input
CLKSEL = ”0”
PCM shift clock input
CLKSEL = ”1”
PCM shift clock output
CLKSEL = ”0”
PCM synchronous signal 8 kHz input
CLKSEL = ”1”
PCM synchronous signal 8 kHz output
General-purpose I/O port C[2]
General-purpose I/O port C[3]
Digital power supply
General-purpose I/O port C[4]
General-purpose I/O port C[5]
Transmit buffer DMA access acknowledge signal input
(primary function)
General-purpose I/O port A[4] (secondary function) [5
V tolerant pin]
Receive buffer DMA access acknowledge signal input
(primary function)
General-purpose I/O port A [5] (secondary function) [5 V
tolerant pin]
General-purpose I/O port C [6]
General-purpose I/O port C [7]
FR0B:(FD_SEL = ”0”)
Transmit buffer frame signal output
DMARQ0B: (FD_SEL = ”1”)
Transmit buffer DMA access request signal
FR1B: (FD_SEL = ”0”)
Receive buffer frame signal output
DMARQ1B: (FD_SEL = ”1”)
Receive buffer DMA access request signal output
Interrupt request output (primary function)
General-purpose I/O port A [6] (secondary function) [5 V
tolerant pin]
Chip select control input
Read control input
Write control input
Digital ground (0.0 V)
I
8
5
BCLK
I/O
“L”
I
9
6
SYNC
I/O
“L”
10
11
12
13
14
—
—
7
—
—
GPIOC[2]
GPIOC[3]
DVDD0
GPIOC[4]
GPIOC[5]
I/O
I/O
—
I/O
I/O
I
I
—
I
I
15
8
ACK0B/GPIOA[
4]
I/O
I
16
9
ACK1B/GPIOA[
5]
I/O
I
17
18
—
—
GPIOC[6]
GPIOC[7]
I/O
I/O
I
I
19
10
FR0B
(DMARQ0B)
O
”H”
20
11
FR1B
(DMARQ1B)
O
“H”
21
12
INTB/GPIOA[6]
I/O
“H”
22
23
24
25
13
14
15
16
CSB
RDB
WRB
DGND0
I
I
I
I
I
I
—
—