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參數(shù)資料
| 型號： | FDG8850NZ |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 小信號晶體管 |
| 英文描述： | Dual N-Channel PowerTrench㈢ MOSFET |
| 中文描述： | 750 mA, 30 V, 2 CHANNEL, N-CHANNEL, Si, SMALL SIGNAL, MOSFET |
| 封裝： | ROHS COMPLIANT, SC-70, 6 PIN |
| 文件頁數(shù)： | 2/5頁 |
| 文件大小： | 329K |
| 代理商： | FDG8850NZ |
F
M
www.fairchildsemi.com
2
2007 Fairchild Semiconductor Corporation
FDG8850NZ Rev.B
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Δ
BV
DSS
Δ
T
J
I
DSS
I
GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I
D
= 250
μ
A, V
GS
= 0V
30
V
I
D
= 250
μ
A, referenced to 25°C
25
mV/°
C
V
DS
= 24V, V
GS
= 0V
V
GS
= ±12V, V
DS
= 0V
1
μ
A
μ
A
±10
On Characteristics
V
GS(th)
Δ
V
GS(th)
Δ
T
J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V
GS
= V
DS
, I
D
= 250
μ
A
0.65
1.0
1.5
V
I
D
= 250
μ
A, referenced to 25°C
–3.0
mV/°C
r
DS(on)
Static Drain to Source On Resistance
V
GS
= 4.5V, I
D
= 0.75A
V
GS
= 2.7V, I
D
= 0.67A
V
GS
= 4.5V, I
D
= 0.75A ,T
J
= 125°C
V
DS
= 5V, I
D
= 0.75A
0.25
0.29
0.36
3
0.4
0.5
0.6
Ω
g
FS
Forward Transconductance
S
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V
DS
= 10V, V
GS
= 0V, f= 1MHZ
90
20
15
120
30
25
pF
pF
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Charge
Gate to Drain “Miller” Charge
V
DD
= 5V, I
D
= 0.5A,
V
GS
= 4.5V,R
GEN
= 6
Ω
4
1
9
1
10
10
18
10
1.44
ns
ns
ns
ns
nC
nC
nC
V
GS
=4.5V, V
DD
= 5V, I
D
= 0.75A
1.03
0.29
0.17
(note 2)
Drain-Source Diode Characteristics
I
S
V
SD
Maximum Continuous Drain-Source Diode Forward Current
Source to Drain Diode Forward Voltage
0.3
1.2
A
V
V
GS
= 0V, I
S
= 0.3A (Note 2)
0.76
and Maximum Ratings
Notes:
1.
R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R
θ
JC
is guaranteed by design while R
θ
JA
is determined by the user's board design.
2. Pulse Test: Pulse Width < 300
μ
s, Duty cycle < 2.0%.
a. 350°C/W when mounted on a
1 in
pad of 2 oz copper .
b. 415°C/W when mounted on a minimum pad
of 2 oz copper.
Scale 1:1 on letter size paper.
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