參數資料
型號: FDC653N
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 小信號晶體管
英文描述: N-Channel Enhancement Mode Field Effect Transistor
中文描述: 5000 mA, 30 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET
封裝: SUPERSOT-6
文件頁數: 2/4頁
文件大小: 70K
代理商: FDC653N
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
BV
DSS
/
T
J
I
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250 μA
I
D
= 250 μA, Referenced to 25
o
C
30
V
Breakdown Voltage Temp. Coefficient
31
mV /
o
C
Zero Gate Voltage Drain Current
V
DS
= 24 V, V
GS
= 0 V
1
μA
T
J
= 55
o
C
10
μA
I
GSSF
I
GSSR
ON CHARACTERISTICS
(Note 2)
Gate - Body Leakage, Forward
V
GS
= 20 V, V
DS
= 0 V
V
GS
= -20 V, V
DS
= 0 V
100
nA
Gate - Body Leakage, Reverse
-100
nA
V
GS(th)
V
GS(th)
/
T
J
R
DS(ON)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250 μA
I
D
= 250 μA, Referenced to 25
o
C
1
1.7
2
V
Gate Threshold VoltageTemp.Coefficient
-4.2
mV /
o
C
Static Drain-Source On-Resistance
V
GS
= 10 V, I
D
= 5 A
0.027
0.035
T
J
= 125
o
C
0.042
0.056
V
GS
= 4.5 V, I
D
= 4.2 A
V
GS
= 10 V, V
DS
= 5 V
V
DS
= 10 V, I
D
= 5 A
0.046
0.055
I
D(on)
g
FS
DYNAMIC CHARACTERISTICS
On-State Drain Current
8
A
Forward Transconductance
6.2
S
C
iss
C
oss
C
rss
SWITCHING CHARACTERISTICS
(Note 2)
Input Capacitance
V
DS
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
350
pF
Output Capacitance
220
pF
Reverse Transfer Capacitance
80
pF
t
D(on)
t
r
Turn - On Delay Time
V
DD
= 10 V, I
D
= 1 A,
V
GS
= 4.5 V, R
GEN
= 6
7.5
15
ns
Turn - On Rise Time
12
25
ns
t
D(off)
t
f
Q
g
Q
gs
Q
gd
DRAIN-SOURCE DIODE CHARACTERISTICS
Turn - Off Delay Time
13
25
ns
Turn - Off Fall Time
6
15
ns
Total Gate Charge
V
DS
= 15 V, I
D
= 5 A,
V
GS
= 10 V
12
17
nC
Gate-Source Charge
2.1
nC
Gate-Drain Charge
2.6
nC
I
S
V
SD
Continuous Source Diode Current
1.3
A
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 1.3 A
(Note 2)
0.75
1.2
V
T
J
= 125
o
C
0.6
1
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
a. 78
o
C/W when mounted on a minimum on a 1 in
2
pad of 2oz Cu in FR-4 board.
b. 156
o
C/W when mounted on a minimum pad of 2oz Cu in FR-4 board.
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%.
FDC653N Rev.C
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參數描述
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