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參數(shù)資料
| 型號(hào)： | FDC6322C |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 小信號(hào)晶體管 |
| 英文描述： | Dual N & P Channel , Digital FET |
| 中文描述： | 220 mA, 25 V, 2 CHANNEL, N AND P-CHANNEL, Si, SMALL SIGNAL, MOSFET |
| 封裝： | SUPERSOT-6 |
| 文件頁數(shù)： | 3/7頁 |
| 文件大小： | 96K |
| 代理商： | FDC6322C |
SWITCHING CHARACTERISTICS
(Note 2)
Symbol
Parameter
Conditions
Type
Min
Typ
Max
Units
t
D(on)
Turn - On Delay Time
N-Channel
N-Ch
5
10
nS
V
DD
= 6 V, I
D
= 0.5 A,
V
Gs
= 4.5 V, R
GEN
= 50
P-Ch
7
14
t
r
Turn - On Rise Time
N-Ch
4.5
10
nS
P-Ch
8
16
t
D(off)
Turn - Off Delay Time
P-Channel
N-Ch
4
8
nS
V
DD
= -6 V, I
D
= -0.5 A,
V
Gen
= -4.5 V, R
GEN
= 50
P-Ch
55
90
t
f
Turn - Off Fall Time
N-Ch
3.2
7
nS
P-Ch
35
55
Q
g
Total Gate Charge
N-Channel
N-Ch
0.49
0.7
nC
V
DS
= 5 V, I
D
= 0.2 A,
V
GS
= 4.5 V
P- Channel
P-Ch
1
1.5
Q
gs
Gate-Source Charge
N-Ch
0.22
nC
P-Ch
0.32
Q
gd
Gate-Drain Charge
V
DS
= -5 V, I
D
= -0.25 A,
V
GS
= -4.5 V
N-Ch
0.07
nC
P-Ch
0.25
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
Maximum Continuous Drain-Source Diode Forward Current
N-Ch
0.5
A
P-Ch
-0.5
V
SD
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 0.5 A
(Note 2)
V
GS
= 0 V, I
S
= -0.5 A
(Note 2)
N-Ch
0.97
1.3
V
P-Ch
-0.88
-1.2
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design. R
θ
JA
shown below for single device operation on FR-4 in still air.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300μs, Duty Cycle < 2.0%.
FDC6322C.Rev B1
b. 180
of 2oz copper.
O
C/W on a 0.005 in
2
of pad
a. 140
2oz copper.
O
C/W on a 0.125 in
2
pad of
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